PIC16LC73A-10/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LC73A-10/SO

8-Bit CMOS Microcontrollers with A/D Converter

Microchip Technology 

10.0 CAPTURE/COMPARE/PWM

MODULE(s)

Applicable Devices

72 73 73A 74 74A 76 77 CCP1

72 73 73A 74 74A 76 77 CCP2

Each CCP (Capture/Compare/PWM) module contains

a 16-bit register which can operate as a 16-bit capture

register, as a 16-bit compare register or as a PWM

master/slave Duty Cycle register. Both the CCP1 and

CCP2 modules are identical in operation, with the

exception of the operation of the special event trigger.

Table 10-1 and Table 10-2 show the resources and

interactions of the CCP module(s). In the following sec-

tions, the operation of a CCP module is described with

respect to CCP1. CCP2 operates the same as CCP1,

except where noted.

PIC16C7X

CCP1 module:

Capture/Compare/PWM Register1 (CCPR1) is com-

prised of two 8-bit registers: CCPR1L (low byte) and

CCPR1H (high byte). The CCP1CON register controls

the operation of CCP1. All are readable and writable.

CCP2 module:

Capture/Compare/PWM Register2 (CCPR2) is com-

prised of two 8-bit registers: CCPR2L (low byte) and

CCPR2H (high byte). The CCP2CON register controls

the operation of CCP2. All are readable and writable.

For use of the CCP modules, refer to the Embedded

Control Handbook, "Using the CCP Modules" (AN594).

TABLE 10-1: CCP MODE - TIMER

RESOURCE

CCP Mode

Capture

Compare

PWM

Timer Resource

Timer1

Timer1

Timer2

TABLE 10-2: INTERACTION OF TWO CCP MODULES

CCPx Mode CCPy Mode

Interaction

Capture

Capture

Compare

PWM

PWM

PWM

Capture

Compare

Compare

PWM

Capture

Compare

Same TMR1 time-base.

The compare should be configured for the special event trigger, which clears TMR1.

The compare(s) should be configured for the special event trigger, which clears TMR1.

The PWMs will have the same frequency, and update rate (TMR2 interrupt).

None

None

© 1997 Microchip Technology Inc.

DS30390E-page 71

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