PIC16C717-I/SS View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16C717-I/SS Datasheet PDF : 200 Pages
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PIC16C717/770/771
15.1 DC Characteristics: PIC16C717/770/771 (Commercial, Industrial)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C ≤ TA ≤ +85°C for industrial and
0°C ≤ TA ≤ +70°C for commercial
Param
No.
Sym
Characteristic
Min Typ† Max Units
Conditions
D001
VDD
Supply Voltage
4.0 — 5.5 V
D002* VDR
RAM Data Retention
Voltage(1)
—
1.5 —
V
D003
VPOR
VDD start voltage to
—
ensure internal Power-on Reset signal
VSS —
V See section on Power-on Reset for
details
D004* SVDD VDD rise rate to ensure internal Power- 0.05 — — V/ms See section on Power-on Reset for
on Reset signal
details. PWRT enabled
D010
IDD
Supply Current(2)
TBD mA FOSC = 20 MHz, VDD = 5.5V*
TBD mA FOSC = 20 MHz, VDD = 4.0V
TBD mA FOSC = 4 MHz, VDD = 4.0V*
TBD mA FOSC = 32 KHz, VDD = 4.0V
D020
IPD
D020A
Power-down Current(3)
—
TBD mA VDD = 5.5V, 0°C to +70°C*
—
1.5 16 µA VDD = 4.0V, 0°C to +70°C
—
1.5 19 µA VDD = 4.0V, -40°C to +85°C
Module Differential Current(5)
D021 ∆IWDT Watchdog Timer
—
6.0 20 µA VDD = 4.0V
D023B* ∆IBG(6) Bandgap voltage generator
— 40µA TBD µA VDD = 4.0V
D025* ∆IT1OSC Timer1 oscillator
—
5
9
µA VDD = 4.0V
D026* ∆IAD
A/D Converter
— 300 — µA VDD = 5.5V, A/D on, not converting
∆ILVD Low Voltage Detect
10 TBD µA VDD = 4.0V*
∆IPBOR Programmable Brown-Out Reset
10 TBD µA PBOR enabled, VDD = 5.0V*
∆IVRH Voltage Reference High
70 TBD µA VDD = 5.0V, no load on VRH*
∆IVRL Voltage Reference Low
70 TBD µA VDD = 4.0V, no load on VRL*
1A
Fosc LP oscillator, operating freq.
INTRC oscillator operating freq.
ER oscillator operating freq.
XT oscillator operating freq.
HS oscillator operating freq.
9
—
—
TBD
—
0
0
— 200 KHz All temperatures
4
— MHz All temperatures, OSCF = 1
37 — MHz All temperatures, OSCF = 0
— TBD MHz All temperatures, OSCF = 1
37 — MHz All temperatures, OSCF = 0
—
4 MHz All temperatures
— 20 MHz All temperatures
*
†
Note 1:
2:
3:
4:
5:
6:
These parameters are characterized but not tested.
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
This is the limit to which VDD can be lowered without losing RAM data.
The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and
switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current consump-
tion.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD
MCLR = VDD; WDT enabled/disabled as specified.
The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is measured with the
part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD or VSS.
For ER osc configuration, current through Rext is not included. The current through the resistor can be estimated by the for-
mula Ir = TBD with Rext in kOhm.
The ∆ current is the additional current consumed when the peripheral is enabled. This current should be added to the base
(IPD or IDD) current.
The bandgap voltage reference provides 1.22V nominal to the VRL, VRH, LVD and BOR circuits. When calculating current con-
sumption use the following formula: ∆IVRL + ∆IVRH + ∆ILVD + ∆IBOR + ∆IBG. Any of the ∆IVRL, ∆IVRH, ∆ILVD or ∆IBOR can be 0.
DS41120A-page 158
Advanced Information
© 1999 Microchip Technology Inc.
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