PIC16C717/770/771
TABLE 15-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
Parameter
No.
Sym Characteristic
Min
Typ†
Max Units
Conditions
30*
TMCL MCLR Pulse Width (low)
2
—
—
µs VDD = 5V, -40°C to +85°C
31*
TWDT Watchdog Timer Time-out Period
7
18
33 ms VDD = 5V, -40°C to +85°C
(No Prescaler)
32*
TOST
Oscillation Start-up Timer Period
— 1024 TOSC —
— TOSC = OSC1 period
33*
TPWRT Power up Timer Period
28
72
132 ms VDD = 5V, -40°C to +85°C
34*
TIOZ
I/O Hi-impedance from MCLR Low —
—
2.1 µs
or Watchdog Timer Reset
35*
TBOR Brown-out Reset pulse width
100
—
—
µs VDD ≤ VBOR (D005)
*
These parameters are characterized but not tested.
†
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
FIGURE 15-9: BROWN-OUT RESET CHARACTERISTICS
VDD
VBOR
(device in Brown-out Reset)
(device not in Brown-out Reset)
RESET (due to BOR)
72 ms time out
FIGURE 15-10: TIMER0 AND TIMER1 EXTERNAL CLOCK TIMINGS
RA4/T0CKI
RC0/T1OSO/T1CKI
40
41
42
45
46
47
TMR0 or
TMR1
Note: Refer to Figure 15-4 for load conditions.
© 1999 Microchip Technology Inc.
Advanced Information
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