PIC16LC717T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LC717T-I/SO

18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-Bit A/D

Microchip Technology 

PIC16C717/770/771

TABLE 3-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA

Address Name

Bit 7 Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on:

POR,

BOR

Value on all

other resets

05h

PORTA

RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 xxxx 0000 uuuu 0000

85h

TRISA PORTA Data Direction Register

1111 1111 1111 1111

9Dh

ANSEL

ANS5 ANS4 ANS3 ANS2 ANS1 ANS0 1111 1111 1111 1111

Legend: x = unknown, u = unchanged, - = unimplemented locations read as ’0’. Shaded cells are not used by PORTA.

3.3 PORTB and the TRISB Register

PORTB is an 8-bit wide bi-directional port. The corre-

sponding data direction register is TRISB. Setting a

TRISB bit (=1) will make the corresponding PORTB pin

an input, i.e., put the corresponding output driver in a

hi-impedance mode. Clearing a TRISB bit (=0) will

make the corresponding PORTB pin an output, i.e., put

the contents of the output latch on the selected pin.

EXAMPLE 3-2: INITIALIZING PORTB

BCF STATUS, RP0 ;

CLRF PORTB

; Initialize PORTB by

; clearing output

; data latches

BSF STATUS, RP0 ; Select Bank 1

MOVLW 0xCF

; Value used to

; initialize data

; direction

MOVWF TRISB

; Set RB<3:0> as inputs

; RB<5:4> as outputs

; RB<7:6> as inputs

MOVLW 03

; Set RB<1:0> as analog

inputs

MOVWF ANSEL

;

BCF STATUS, RP0 ; Return to Bank 0

Each of the PORTB pins has an internal pull-up, which

can be individually enabled from the WPUB register. A

single global enable bit can turn on/off the enabled pull-

ups. Clearing the RBPU bit, (OPTION_REG<7>),

enables the weak pull-up resistors. The weak pull-up is

automatically turned off when the port pin is configured

as an output. The pull-ups are disabled on a Power-on

Reset.

Each of the PORTB pins, if configured as input, also

has an interrupt on change feature, which can be indi-

vidually selected from the IOCB register. The RBIE bit

in the INTCON register functions as a global enable bit

to turn on/off the interrupt on change feature. The

selected inputs are compared to the old value latched

on the last read of PORTB. The "mismatch" outputs are

OR’ed together to generate the RB Port Change Inter-

rupt with flag bit RBIF (INTCON<0>).

This interrupt can wake the device from SLEEP. The

user, in the interrupt service routine, can clear the inter-

rupt in the following manner:

a) Any read or write of PORTB. This will end the

mismatch condition.

b) Clear flag bit RBIF.

A mismatch condition will continue to set flag bit RBIF.

Reading PORTB will end the mismatch condition and

allow flag bit RBIF to be cleared.

The interrupt on change feature is recommended for

wake-up on key depression operation and operations

where PORTB is only used for the interrupt on change

feature. Polling of PORTB is not recommended while

using the interrupt on change feature.

REGISTER 3-2: WEAK PULL UP PORTB REGISTER (WPUB: 95h)

R/W-1

WPUB7

bit7

R/W-1

WPUB6

R/W-1

WPUB5

R/W-1

WPUB4

R/W-1

WPUB3

R/W-1

WPUB2

R/W-1

WPUB1

R/W-1

WPUB0

bit0

bit 7-0:

WPUB<7:0>: PORTB Weak Pull-Up Control

1 = Weak pull up enabled.

0 = Weak pull up disabled

R = Readable bit

W = Writable bit

U = Unimplemented bit, read

as ‘0’

-n = Value at POR reset

Note 1: For the WPUB register setting to take effect, the RBPU bit in the OPTION_REG Register must be cleared.

2: The weak pull up device is automatically disabled if the pin is in output mode (TRIS = 0).

© 1999 Microchip Technology Inc.

Advanced Information

DS41120A-page 35

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