ST10F280
TABLE OF CONTENTS
1-
INTRODUCTION ........................................................................................................
6
2-
BALL DATA ...............................................................................................................
7
3-
FUNCTIONAL DESCRIPTION ...................................................................................
17
4-
MEMORY ORGANIZATION .......................................................................................
18
5-
INTERNAL FLASH MEMORY ...................................................................................
21
5.1 -
OVERVIEW ................................................................................................................
21
5.2 -
OPERATIONAL OVERVIEW ......................................................................................
21
5.3 -
ARCHITECTURAL DESCRIPTION ............................................................................
23
5.3.1 - Read Mode .................................................................................................................
23
5.3.2 -
Command Mode .........................................................................................................
23
5.3.3 - Flash Status Register .................................................................................................
23
5.3.4 - Flash Protection Register ...........................................................................................
25
5.3.5 - Instructions Description ..............................................................................................
25
5.3.6 - Reset Processing and Initial State ..............................................................................
29
5.4 -
FLASH MEMORY CONFIGURATION ........................................................................
29
5.5 -
APPLICATION EXAMPLES .......................................................................................
29
5.5.1 -
Handling of Flash Addresses ......................................................................................
29
5.5.2 - Basic Flash Access Control ........................................................................................
30
5.5.3 -
Programming Examples .............................................................................................
31
5.6 -
BOOTSTRAP LOADER ............................................................................................
34
5.6.1 - Entering the Bootstrap Loader ....................................................................................
34
5.6.2 -
Memory Configuration After Reset .............................................................................
35
5.6.3 - Loading the Startup Code ...........................................................................................
36
5.6.4 - Exiting Bootstrap Loader Mode ..................................................................................
36
5.6.5 - Choosing the Baud Rate for the BSL .........................................................................
37
6-
CENTRAL PROCESSING UNIT (CPU) .....................................................................
38
6.1 -
MULTIPLIER-ACCUMULATOR UNIT (MAC) .............................................................
39
6.1.1 -
Features .....................................................................................................................
40
6.1.1.1 - Enhanced Addressing Capabilities ..............................................................................
40
6.1.1.2 - Multiply-Accumulate Unit .............................................................................................
40
6.1.1.3 - Program Control ..........................................................................................................
40
6.2 -
INSTRUCTION SET SUMMARY ................................................................................
41
6.3 -
MAC COPROCESSOR SPECIFIC INSTRUCTIONS .................................................
42
7-
7.1 -
7.2 -
EXTERNAL BUS CONTROLLER ..............................................................................
46
PROGRAMMABLE CHIP SELECT TIMING CONTROL ............................................
46
READY PROGRAMMABLE POLARITY .....................................................................
47
8-
8.1 -
INTERRUPT SYSTEM ...............................................................................................
49
EXTERNAL INTERRUPTS .........................................................................................
49
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