ST20C2 View Datasheet(PDF) - STMicroelectronics
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ST20C2 Datasheet PDF : 212 Pages
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2 Addressing and data representation
The ST20 processor is a 32-bit word machine, with byte addressing and a 4 Gbyte
address space. This chapter explains how data is loaded from and stored into that
address space, explains how signed arithmetic is represented, and defines the
arithmetic significance of order ing of data items.
2.1 Word address and byte selector
A machine address is a single word of data which identifies a b yte in memory - i.e. a
byte address. It comprises two parts, a word address and a byte selector. The byte
selector occupies the two least significant bits of the word; the word address the thirty
most significant bits. An address is treated as a signed value, the range of which
starts at the most negative integer and continues, through zero, to the most positive
integer. This enables the standard comparison functions to be used on pointer
(address) values in the same way that they are used on numerical values.
Certain values can never be used as pointers because they represent reserved
addresses at the bottom of memory space. They are reserved for use by the
processor and initialization. In this text, names are used to represent these and other
values (e.g. NotProcess.p, Disabling.p). A full list of names and values of constants
used in this book is given in section 1.9.
2.2 Ordering of information
The ST20 is ‘little-endian’ — i.e. less significant data is always held in lower
addresses. This applies to bits in bytes, bytes in words and words in memory. Hence,
in a word of data representing an integer, one byte is more significant than another if
its byte selector is the larger of the two. Figure 2.1 shows the ordering of bytes in
words and memory for the ST20. Note that this ordering is compatible with Intel
processors, but not Motorola or SPARC.
Memory
(bytes)
X+7
X+6
X+5
X+4
X+3
X+2
X+1
X+0
words (wordlength is 32 bits)
MSB
LSB
X+7
X+6
X+5
X+4
31
24 23
16 15
87
0
MSB
LSB
X+3
X+2
X+1
X+0
31
24 23
16 15
87
0
X is a word-aligned byte address
X+n is the byte n bytes past X
Figure 2.1 Bytes in memory and words
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