ST62P63C View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST62P63C

8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, SAFE RESET, AUTO-RELOAD TIMER, EEPROM AND SPI

STMicroelectronics 

ST62T53C/T60C/T63C ST62E60C

CLOCK SYSTEM (Cont’d)

Oscillator Control Registers

Address: DCh — Write only

Reset State: 00h

7

0

-

-

-

-

OSCR

3

-

RS1 RS0

Bit 7-4. These bits are not used.

Bit 3. Reserved. Cleared at Reset. Must be kept

cleared.

Bit 2. Reserved. Must be kept low.

RS1-RS0. These bits select the division ratio of

the Oscillator Divider in order to generate the inter-

nal frequency. The following selctions are availa-

ble:

RS1

0

0

1

1

RS0

Division Ratio

0

1

1

2

0

4

1

4

Note: Care is required when handling the OSCR

register as some bits are write only. For this rea-

son, it is not allowed to change the OSCR contents

while executing interrupt service routine, as the

service routine cannot save and then restore its

previous content. If it is impossible to avoid the

writing of this register in interrupt service routine,

an image of this register must be saved in a RAM

location, and each time the program writes to

OSCR it must write also to the image register. The

image register must be written first, so if an inter-

rupt occurs between the two instructions the

OSCR is not affected.

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