ST62P32BQ1 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST62P32BQ1

8-BIT OTP/EPROM MCUs WITH A/D CONVERTER, 16-BIT AUTO-RELOAD TIMER, EEPROM, SPI AND UART

STMicroelectronics 

ST62T32B ST62E32B

INTERRUPTS (Cont’d)

3.4.3 Interrupt Option Register (IOR)

The Interrupt Option Register (IOR) is used to en-

able/disable the individual interrupt sources and to

select the operating mode of the external interrupt

inputs. This register is write-only and cannot be

accessed by single-bit operations.

Address: 0C8h — Write Only

Reset status: 00h

7

0

- LES ESB GEN -

-

-

-

Bit 5 = ESB: Edge Selection bit.

The bit ESB selects the polarity of the interrupt

source #2.

Bit 4 = GEN: Global Enable Interrupt. When this bit

is set to one, all interrupts are enabled. When this

bit is cleared to zero all the interrupts (excluding

NMI) are disabled.

When the GEN bit is low, the NMI interrupt is ac-

tive but cannot cause a wake up from STOP/WAIT

modes.

This register is cleared on reset.

Bit 7, Bits 3-0 = Unused.

Bit 6 = LES: Level/Edge Selection bit.

When this bit is set to one, the interrupt source #1

is level sensitive. When cleared to zero the edge

sensitive mode for interrupt request is selected.

3.4.4 IInterrupt sources

Interrupt sources available on the

ST62E32B/T32B are summarized in theTable 11

with associated mask bit to enable/disable the in-

terrupt request.

Table 11. Interrupt Requests and Mask Bits

Peripheral

Register

Address

Register

Mask bit

GENERAL

IOR

C8h

GEN

TIMER

TSCR1

D4h

ETI

A/D CONVERTER ADCR

D1h

EAI

UART

UARTCR

D7h

RXIEN

TXIEN

SCR1

E8h

OVFIEN

ARTIMER

SCR2

E1h

SCR3

E2h

SCR3

E2h

CP1IEN

CP2IEN

ZEROIEN

SCR3

E2h

CMPIEN

SPI

SPI

DCh

ALL

Port PAn

ORPA-DRPA C0h-C4h

ORPAn-DRPAn

Port PBn

ORPB-DRPB C1h-C5h

ORPBn-DRPBn

Port PCn

ORPC-DRPC C2h-C6h

ORPCn-DRPCn

Port PDn

ORPD-DRPD C3h-C7h

ORPDn-DRPDn

Port PEn

ORPE-DRPE FCh-FDh

ORPEn-DRPEn

Masked Interrupt Source

All Interrupts, excluding NMI

TMZ: TIMER Overflow

EOC: End of Conversion

RXRDY : Byte received

TXMT : Byte sent

OVFFLG: ARTIMER Overflow

CP1FLG

CP2FLG

ZEROFLG: Compare to zero flag

CMPFLG: Compare flag

End of Transmission

PAn pin

PBn pin

PCn pin

PDn pin

PEn pin

Interrupt

source

All

source 4

source 4

source 4

source 3

source 1

source 1

source 2

source 0

source 2

source 1

31/86

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