ERRATA SHEET
ST72264 LIMITATIONS AND CORRECTIONS
17 SILICON IDENTIFICATION
This document refers to ST72F264 devices and subsets (ST72F260, ST72F262).
They are identifiable:
s On the device package, by the last letter of the Trace code marked on the device package
s On the box, by the last 3 digits of the Internal Sales Type printed on the box label.
Table 32. Device Identification
Trace Code marked on device
Flash Devices: “xxxxxxxxxZ”
Internal Sales Type on box label
72F264xxxx$U2
72F264xxxx$A2
18 REFERENCE SPECIFICATION
Limitations in this document are with reference to the ST72264 Datasheet Revision 1.7 (Au-
gust 2003).
19 SILICON LIMITATIONS
This section lists the known limitations of the devices referenced in Table 32.
19.1 EXECUTION OF BTJX INSTRUCTION
When testing the address $FF with the "BTJT" or "BTJF" instructions, the CPU may perform
an incorrect operation when the relative jump is negative and performs an address page
change.
To avoid this issue, including when using a C compiler, it is recommended to never use ad-
dress $00FF as a variable (using the linker parameter for example).
19.2 I/O PORT B AND C CONFIGURATION
When using an external quartz crystal or ceramic resonator, the fOSC2 clock may be disturbed
because the device goes into reserved mode controlled by Port B and C.
This happens with either one of the following configurations:
Rev. 2.3
August 2003
166/171
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