ST72260G1B6/XXX View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72260G1B6/XXX

8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES

STMicroelectronics 

ST72260G, ST72262G, ST72264G

8 POWER SAVING MODES

8.1 INTRODUCTION

To give a large measure of flexibility to the applica-

tion in terms of power consumption, three main

power saving modes are implemented in the ST7

(see Figure 21).

After a RESET the normal operating mode is se-

lected by default (RUN mode). This mode drives

the device (CPU and embedded peripherals) by

means of a master clock which is based on the

main oscillator frequency divided by 2 (fCPU).

From Run mode, the different power saving

modes may be selected by setting the relevant

register bits or by calling the specific ST7 software

instruction whose action depends on the oscillator

status.

Figure 21. Power Saving Mode Transitions

High

RUN

SLOW

WAIT

SLOW WAIT

8.2 SLOW MODE

This mode has two targets:

– To reduce power consumption by decreasing the

internal clock in the device,

– To adapt the internal clock frequency (fCPU) to

the available supply voltage.

SLOW mode is controlled by three bits in the

MISR1 register: the SMS bit which enables or dis-

ables Slow mode and two CPx bits which select

the internal slow frequency (fCPU).

In this mode, the oscillator frequency can be divid-

ed by 4, 8, 16 or 32 instead of 2 in normal operat-

ing mode. The CPU and peripherals are clocked at

this lower frequency.

Note: SLOW-WAIT mode is activated when enter-

ring the WAIT mode while the device is already in

SLOW mode.

Figure 22. SLOW Mode Clock Transitions

fCPU

fOSC2/2

fOSC2/4

fOSC2

fOSC2

CP1:0

00

01

SMS

HALT

Low

POWER CONSUMPTION

NEW SLOW

FREQUENCY

REQUEST

NORMAL RUN MODE

REQUEST

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