ST72521
I/O PORTS (Cont’d)
Figure 30. I/O Port General Block Diagram
REGISTER
ACCESS
ALTERNATE
OUTPUT
1
0
ALTERNATE
ENABLE
DR
DDR
OR
OR SEL
If implemented
DDR SEL
DR SEL
1
0
EXTERNAL
INTERRUPT
SOURCE (eix)
VDD
P-BUFFER
(see table below)
PULL-UP
(see table below)
VDD
PULL-UP
CONDITION
PAD
N-BUFFER
CMOS
SCHMITT
TRIGGER
DIODES
(see table below)
ANALOG
INPUT
ALTERNATE
INPUT
Table 9. I/O Port Mode Options
Configuration Mode
Input
Output
Floating with/without Interrupt
Pull-up with/without Interrupt
Push-pull
Open Drain (logic level)
True Open Drain
Legend: NI - not implemented
Off - implemented not activated
On - implemented and activated
Pull-Up
Off
On
Off
NI
P-Buffer
Off
On
Off
NI
Diodes
to VDD
to VSS
On
On
NI (see note)
Note: The diode to VDD is not implemented in the
true open drain pads. A local protection between
the pad and VSS is implemented to protect the de-
vice against positive stress.
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