ST72521AR9TC View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72521AR9TC

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE

STMicroelectronics 

ST72521

MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK (Cont’d)

Bit 0 = OIF Oscillator interrupt flag

This bit is set by hardware and cleared by software

reading the MCCSR register. It indicates when set

that the main oscillator has reached the selected

elapsed time (TB1:0).

0: Timeout not reached

1: Timeout reached

CAUTION: The BRES and BSET instructions

must not be used on the MCCSR register to avoid

unintentionally clearing the OIF bit.

MCC BEEP CONTROL REGISTER (MCCBCR)

Read /Write

Reset Value: 0000 0000 (00h)

7

0

0

0

0

0

0

0 BC1 BC0

Bit 7:2 = Reserved, must be kept cleared.

Bit 1:0 = BC[1:0] Beep control

These 2 bits select the PF1 pin beep capability.

BC1 BC0

Beep mode with fOSC2=8MHz

0

0

Off

0

1

1

0

1

1

~2-KHz

~1-KHz

~500-Hz

Output

Beep signal

~50% duty cycle

The beep output signal is available in ACTIVE-

HALT mode but has to be disabled to reduce the

consumption.

Table 14. Main Clock Controller Register Map and Reset Values

Address

(Hex.)

Register

Label

7

6

5

4

3

002Bh

SICSR

Reset Value

AVDS

0

AVDIE

0

AVDF

0

LVDRF

x

0

002Ch

MCCSR

Reset Value

MCO

0

CP1

0

CP0

0

SMS

0

TB1

0

002Dh

MCCBCR

Reset Value

0

0

0

0

0

2

CSSIE

0

TB0

0

0

1

0

CSSD

0

OIE

0

BC1

0

WDGRF

x

OIF

0

BC0

0

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