ST7MC2N6T3 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST7MC2N6T3

8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI™

STMicroelectronics 

ST7MC1xx/ST7MC2xx

MOTOR CONTROLLER (Cont’d)

All detections of Zn events are done during a short

measurement window while the high side switch is

turned off. For this reason the PWM signal is ap-

plied on the high side switches.

When the high side switch is off, the high side

winding is tied to 0V by the free-wheeling diode,

the low side winding voltage is also held at 0V by

the low side ON switch and the complete BEMF

voltage is present on the third winding: detection is

then possible.

Table 24. Step Configuration Summary

Configuration

Current direction

High side

Low side

OO[5:0] bits in MPHST register

Measurement done on:

IS[1:0] bits in MPHST register

Back EMF shape

CPB bit in MCRB register

(ZVD bit = 0)

Voltage on measured point at the

start of demagnetization

Σ1

A to B

T0

T3

001001

MCIC

10

Falling

0

0V

Σ2

A to C

T0

T5

100001

MCIB

01

Rising

1

HV

Step

Σ3

B to C

Σ4

B to A

T2

T2

T5

T1

100100 000110

MCIA MCIC

00

10

Falling Rising

0

1

0V

HV

Σ5

C to A

T4

T1

010010

MCIB

01

Falling

0

0V

Σ6

C to B

T4

T3

011000

MCIA

00

Rising

1

HV

HDM-SDM bits in MCRB register 10

11

10

11

10

11

PWM side selection to accelerate

demagnetization

Low Side

High Side

Low Side

High Side

Low Side

High Side

Driver selection to accelerate de-

magnetization

T3

T0

T5

T2

T1

T4

For a detailed description of the MTC registers,

see Section 10.6.13.

10.6.4 Application Example: AC Induction

Motor Drive

Although the command sequence is rather differ-

ent between a PM BLDC and an AC three-phase

induction motor, the Motor Controller can be con-

figured to generate three-phase sinusoidal voltag-

es.

A timer with three independent PWM channels is

available for this purpose. Based on each of the

PWM reference signal, two complemented PWM

signals with deadtime are generated on the output

pins (6 in total), to drive directly an inverter with tri-

ple half bridge topology.

The variable voltage levels to be applied on the

motor terminals come from continuously varying

duty cycle, from one PWM period to the other (re-

fer to Figure 75 on page 144). The PWM counter

generates a dedicated Update event (U event)

which:

– updates automatically the compare registers set-

ting the duty cycle to avoid time critical issues

and ensure glitchless PWM operation.

– generates a dedicated U interrupt in which the

values for the next coming update event are

loaded in compare preload registers.

The shape of the output voltage (voltage, frequen-

cy, sinewave, trapezoid, ...) is completely man-

aged by the applicative software, in charge of

computing the compare values to be loaded for a

given PWM duty-cycle (refer to Figure 76).

143/309

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