ST7FMC1M2T3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST7FMC1M2T3
STMicroelectronics
ST7FMC1M2T3 Datasheet PDF : 309 Pages
| |||
ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
10.6.6.3 D Event detection
In sensorless mode, the D Window Filter becomes
active after each C event. It blanks out the D event
during the time window defined by the DWF[3:0]
bits in the MDFR register (see Table 26). The reset
value is 200µs.
This Window Filter becomes active after both
hardware and software C events.
The D Event Filter becomes active after the D Win-
dow Filter. It counts the number of consecutive D
events up to a limit defined by the DEF[3:0] bits in
the MDFR register. The reset value is 1. The D bit
is set when the counter limit is reached.
Sampling is done at a selectable frequency
(fSCF ), see Table 82.
The D event filter is active only for a hardware D
event (DH). For a simulated (DS) event, it is forced
to 1.
Figure 79. D Window and Event Filter Flowchart
C
No
End of
Blanking Window
?
WINDOW
FILTER
Yes
Sampling
No
D
Event
?
EVENT
FILTER
Yes
Reset counter
No
Limit=1?
Increment counter
Yes
No Counter=Limit?
C to D window fil-
DWF3 DWF2 DWF1 DWF0 ter in Sensorless SR=1
Mode (SR=0)
0
0
0
0
5 µs
0
0
0
1
10 µs
0
0
1
0
15 µs
0
0
1
1
20 µs
0
1
0
0
25 µs
0
1
0
1
30 µs
0
1
1
0
35 µs
0
1
1
1
40 µs
1
0
0
0
60 µs
1
0
0
1
80 µs
1
0
1
0
100 µs
1
0
1
1
120 µs
1
1
0
0
140 µs
1
1
0
1
160 µs
1
1
1
0
180 µs
1
1
1
1
200 µs
Note: Times are indicated for 4 MHz fPERIPH
Table 27. D Event filter Setting
DEF3 DEF2 DEF1 DEF0 D event Limit SR=1
0
0
0
0
1
0
0
0
1
2
0
0
1
0
3
0
0
1
1
4
0
1
0
0
5
0
1
0
1
6
0
1
1
0
7
0
1
1
1
8
1
0
0
0
9
1
0
0
1
10
1
0
1
0
11
1
0
1
1
12
1
1
0
0
13
1
1
0
1
14
1
1
1
0
15
1
1
1
1
16
Yes
Set the D bit
150/309
1
Share Link: 