ST7PMC2S7B6 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST7PMC2S7B6

8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI™

STMicroelectronics 

ST7MC1xx/ST7MC2xx

MOTOR CONTROLLER (Cont’d)

10.6.7.4 Built-in Checks and Controls for

simulated events

As described in Figure 91. on page 168, MZREG,

MDREG and MCOMP registers are capture/com-

pare registers. The Compare registers are write

accessible and can be used to generate simulated

events. The value of the MTIM timer is compared

with the value written in the registers and when the

MTIM value reaches the corresponding register

value, the simulated event is generated. Simulated

event generation is enabled when the correspond-

ing bits are set:

– In the MCRB register for simulated demagneti-

sation

– SDM for simulated demagnetisation

– In the MCRC register for simulated zero-crossing

and commutation.

– SC for simulated commutation

– SZ for simulated zero-crossing event.

To avoid a system stop, special attention is need-

ed when writing in the register to generate the cor-

responding simulated event. The value written in

the register has to be greater than the current val-

ue of the MTIM timer when writing in the registers.

If the value written in the registers (MDREG,

MZREG or MCOMP) is already less than the cur-

rent value of MTIM, the simulated event will never

be generated and the system will be stopped.

For this reason, built-in checks and controls have

been implemented in the MTIM timer.

If the value written in one of those registers in sim-

ulated event generation mode is less than or equal

to the current value of the timer when it is com-

pared, the simulated event is generated immedi-

ately and the value of the MTIM timer at the time

the simulated event occurs overwrites the value in

the registers. Like that the value in the register re-

ally corresponds to the simulated event generation

and can be re-used to generate the next simulated

event.

So, the value written in the registers able to gener-

ate simulated events is checked by hardware and

compare to the current MTIM value to verify that it

is greater.

Figure 95. Simulated demagnetisation / zero-crossing event generation (SC=0)

After C interrupt

After D interrupt

MDREG value checked

MZREG value checked

if MDREG<=MTIM

if MZREG<=MTIM

Immediate DS generation

ZH

ZH

Immediate ZS generation

ZS

ZS

DS

DH

CH

CH

During C interrupt

Simulated or Hardware D/Z events

Value written in MDREG/MZREG if

simulated event generation

DS

CH

ZS Simulated zero-crossing

DZCHSH

Simulated

Hardware

Hardware

demagnetisation

zero-crossing

commutation

t

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