ST7FMC1M4T3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST7FMC1M4T3
STMicroelectronics
ST7FMC1M4T3 Datasheet PDF : 309 Pages
| |||
ST7MC1xx/ST7MC2xx
12.13 OPERATIONAL AMPLIFIER CHARACTERISTICS
Subject to general operating conditions for fOSC, and TA unless otherwise specified.
(TA = -40..+125oC, VDD-VSSA = 4.5..5.5V unless otherwise specified
Symbol
Parameter
Conditions
RL
Resistive Load (max 500µA @
5V)
CL
VCMIR
Vio
ΔVio
Capacitive Load at VOUT pin
Common Mode Input Range
Input Offset Voltage ( + or - ) 3) After calibration, VIC =1V
Input Offset Voltage Drift from with respect to temperature
the calibrated Voltage, temper- with respect to common mode input
ature conditions
with respect to supply
CMR
Common Mode Rejection
Ratio
HIGHGAIN=0 @ 100kHz
SVR
Supply Voltage Rejection
Ratio
@ 100kHz
Avd Voltage Gain
VSAT_OH
High Level Output Saturation
Voltage (VDD-VOUT)
VSAT_OL
Low Level Output Saturation
Voltage
RL=10kΩ
RL=10kΩ
RL=10kΩ
GBP Gain Bandwidth Product
VOAP = VDD / 2, measured at HIGHGAIN=0
0dB gain, feedback resistor
ratio = 10 (20dB inverting con- HIGHGAIN=1
figuration)
SR+ Slew Rate while rising
HIGHGAIN=0
(AVCL=1, RL=10kΩ, CL=150pF, Vi=1.75V to
2.75V) 1)
SR- Slew Rate while falling
HIGHGAIN=0
(AVCL=1, RL=10kΩ, CL=150pF, Vi=1.75V to
2.75V) 1)
Φm Phase Margin
HIGHGAIN=0
HIGHGAIN=1
Twakeup
Wakeup time for the opamp
from off state
Min Typ Max Unit
10
kΩ
150
VSSA
VDD/2
2.5 10 4)
8.5 5)
1 5)
3.1 5)
pF
V
mV
μV/oC
mV/V
mV/V
74
dB
502) 65
(1.5)2) 12
60 90 2)
dB
V/mV
mV
30 90 2)
1.3 2) 1.5 2 2)
2.6 2) 3 4 2)
mV
MHz
12) 2
V/μs
2.52) 7.5
V/μs
73
degrees
75
0.8 6)
1.6 6) μs
Note:
1. AVCL = closed loop gain
2. Data based on characterization results, not tested in production.
3. after offset compensation has been performed.
4. The amplifier accuracy is dependent on the environment. The offset value is given for a measurement done with all
digital I/Os stable. Negative injection current on the I/Os close to the inputs may reduce the accuracy. In particular care
must be taken to avoid switching on I/Os close to the inputs when the opamp is in use. This phenomenon is even more
critical when a big external serial resistor is added on the inputs.
5. The Data provided from simulations (not tested in production) to guide the user when re-calibration is needed.
6. The Data provided from simulations (not tested in production).
280/309
Share Link: 