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ST7MC2N6T3 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
ST7MC2N6T3 Datasheet PDF : 309 Pages
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ST7MC1xx/ST7MC2xx
INTERRUPTS (Cont’d)
7.7 EXTERNAL INTERRUPT CONTROL REGISTER (EICR)
Read / Write
Reset Value: 0000 0000 (00h)
7
0
IS11 IS10 IPB IS21 IS20 IS31 IS30 IPA
Bit 7:6 = IS1[1:0] ei2 sensitivity
The interrupt sensitivity, defined using the IS1[1:0]
bits, is applied to the following external interrupts:
- ei2 (port C3..1)
IS11 IS10
External Interrupt Sensitivity
IPB bit =0
IPB bit =1
These 2 bits can be written only when I1 and I0 of
the CC register are both set to 1 (level 3).
Bit 5 = IPB Interrupt polarity for port C
This bit is used to invert the sensitivity of the port
C[3:1] external interrupts. It can be set and cleared
by software only when I1 and I0 of the CC register
are both set to 1 (level 3).
0: No sensitivity inversion
1: Sensitivity inversion
Bit 4:3= IS2[1:0] ei1sensitivity
The interrupt sensitivity, defined using the IS2[1:0]
bits, is applied to the following external interrupts:
- ei1 (port A3, A5...A7)
00
Falling edge &
low level
Rising edge
& high level
0 1 Rising edge only Falling edge only
1 0 Falling edge only Rising edge only
11
Rising and falling edge
- ei2 (port C0, B7..6)
IS21 IS20
00
01
10
11
External Interrupt Sensitivity
Falling edge & low level
Rising edge only
Falling edge only
Rising and falling edge
IS11 IS10
00
01
10
11
External Interrupt Sensitivity
Falling edge & low level
Rising edge only
Falling edge only
Rising and falling edge
Bit 2:1= IS3[1:0] ei0sensitivity
The interrupt sensitivity, defined using the IS2[1:0]
bits, is applied to the following external interrupts:
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