ST92195C/D View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92195C/D

48-96 Kbyte ROM HCMOS MCU WITH ON-SCREEN DISPLAY AND TELETEXT DATA SLICER

STMicroelectronics 

ST92E195C/D-ST92T195C/D - ELECTRICAL CHARACTERISTICS

I²C BUS TIMING

Symbol

Parameter

TBUF

THD:STA

TLOW

THIGH

TSU:STA

THD:DAT

TSU:DAT

TR

TF

TSU:STO

Cb

Bus free time between a STOP and START con-

dition

Hold time START condition. After this period,

the first clock pulse is generated

LOW period of the SCL clock

HIGH period of the SCL clock

Set-up time for a repeated START condition

Data hold time

Data set-up time

Rise time of both SDA and SCL signals

Fall time of both SDA and SCL signals

Set-up time for STOP condition

Capacitive load for each bus line

Standard I²C

Min

Max

4.7

4.0

4.7

4.0

4.7

0 (1)

250

4.0

1000

300

400

Fast I²C

Min

Max

1.3

0.6

1.3

0.6

0.6

0 (1)

100

20+0.1Cb

20+0.1Cb

0.6

0.9(2)

300

300

400

Unit

ms

µs

µs

µs

µs

ns

ns

ns

ns

ns

pF

1)The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the unde-

fined region of the falling edge of SCL

2)The maximum hold time of the START condition has only to be met if the interface does not stretch the low period

of SCL signal

Cb = total capacitance of one bus line in pF

243/249

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