ST92195C/D - RESET AND CLOCK CONTROL UNIT (RCCU)
Table 10. Oscillator Transconductance
gm
Min
Typ
Max
mA/V
0.77
1.5
2.4
Figure 29. Crystal Oscillator
CRYSTAL CLOCK
ST9
The following table is relative to the fundamental
quartz crystal only; assuming:
– Rs: parasitic series resistance of the quartz crys-
tal (upper limit)
– C0: parasitic capacitance of the crystal (upper
limit, ≤ 7 pF)
– C1,C2: maximum total capacitance on pins OS-
CIN/OSCOUT (value including external capaci-
tance tied to the pin plus the parasitic
capacitance of the board and device).
OSCIN
OSCOUT
CL1
CL2
Table 11. Crystal Specification (C0 ≤ 7 pF)
Freq.
MHz.
CL1 = CL2 = 39 pF
Rs Max
8
65
4
260
Note: Depending on the application it may be better not to
implement CL1.
Figure 30. Internal Oscillator Schematic
HALT
Legend:
Rs: Parasitic Series Resistance of the quartz crystal (up-
per limit) C0: Parasitic capacitance of the quartz crystal
(upper limit, < 7pF)
CL1, CL2: Maximum Total Capacitance on pins OSCIN
and OSCOUT (the value includes the external capaci-
tance tied to the pin plus the parasitic capacitance of the
board and of the device)
gm: Transconductance of the oscillator
Note.The tables are relative to the fundamental quartz
crystal only (not ceramic resonator).
R
RIN
ROUT
OSCIN
OSCOUT
Figure 31. External Clock
n
EXTERNAL CLOCK
OSCIN
CLOCK
INPUT
OSCOUT
NC
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