STA321
Register description
PLLCFG2
7
6
5
4
3
2
1
0
PLL_FRAC[7:0]
Address:
Type:
Reset:
Description:
0xC2
RW
0x00
See also Section 5.3: Fractional PLL on page 31
[7:0] PLL_FRAC[7:0]
The LSBs of PLL_FRAC[15:0] which is used to set the PLL multiplication factor
PLLCFG3
7
6
5
4
3
2
1
0
PLL_STRB PLL_STRBBYP
PLL_NDIV
Address:
Type:
Reset:
Description:
0xC3
RW
0x00
See also Section 5.3: Fractional PLL on page 31
[7] PLL_STRB
0: normal behaviour
1: asynchronous strobe input, a new configuration input is loaded into the fraction controller
[6] PLL_STRBBYP
0: normal behaviour
1: bypass the strobe signal
[5:0] PLL_NDIV
Set the PLL multiplication factor (integral part), loop division factor (LDF)
Doc ID 15351 Rev 3
131/157