STA321 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STA321

4-channel digital audio system with FFX™ driver

STMicroelectronics 

STA321

Digital processing stage

The ramp procedure ends when the target volume or mute level is reached. The time for the

volume change is calculated as:

tCHANGE = (volumeCURRENT - volumeTARGET) / 0.5 * tSTEP

If SVOL_ONx is not used, the volume and mute are set instantaneously.

The STA321 also has the possibility to put the FFX into mute in the event of bad input data

using register FFXCFG0. If bit BAD_CKS_M is set to 1 the FFX is muted when BICLK and

LRCLK do not meet the specifications. If MIS_BICK_M is set to 1 the FFX is muted when

BICLK is missing. The mute can be applied gradually or abruptly via bit BAD_IN_M.

6.12

Limiter (clamping)

The saturation stage provides an individual or a global limitation on the output signal

amplitude such that if the signal is above the limiting value then it is truncated (clamped).

A 23-bit saturation value made up using registers SATCHxCFG1, SATCHxCFG2 and

SATCHxCFG3 can be set for each channel x.

However, if bit 7 of register SATCH0CFG1 on page 116 is set to 1, all the channels take the

saturation value of channel 0 and ignore the individual settings.

6.13

FFX channel re-mapping

Figure 25. FFX re-mapping

Processing block

FFX block

Channle 0

FFX ch1

pwm_1a

pwm_1b

Channel 1

FFX ch2

pwm_2a

pwm_2b

Channel 2

FFX ch3

pwm_3a

pwm_3b

Channel 3

FFX ch4

pwm_4a

pwm_4b

Channel re-map

cb1_map

cb_pwm_1

cb2_map

cb_pwm_2

cb3_map

cb_pwm_3

pwm00_map

pwm_00

ea1a_map

ea1b_map

ea2a_map

ea2b_map

ea_pwm_1a

ea_pwm_1b

ea_pwm_2a

ea_pwm_2b

CMOS

bridge

OUT1

OUT2

OUT3

The channels are re-mapped through registers PWMMAP1, PWMMAP2 and PWMMAP3 on

page 86. The default configuration routes the channels directly to their respective CB/EA

signals:

pwm_1a -> cb_pwm_1

pwm_1b -> cb_pwm_2

pwm_2a -> cb_pwm_3

pwm_2b -> pwm_00 (PWM00)

pwm_3a -> ea_pwm_1 (EAPWM1)

pwm_3b -> ea_pwm_2 (EAPWM2)

pwm_4a -> ea_pwm_3 (EAPWM3)

pwm_4b -> ea_pwm_4 (EAPWM4)

Doc ID 15351 Rev 3

43/157

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