Registers
STA321MP
7.2.42 Channel I2S output mapping channels 7 and 8 (0x3A)
D7
D6
D5
D4
D3
D2
D1
D0
C8OM2
1
C8M1
1
C8OM0
1
C7OM2
1
C7OM1
1
C7OM0
0
Each I2S output channel can receive data from any channel output of the volume block.
Which channel a particular I2S output receives is dependent upon that channel’s CnOM
register bits.
7.2.43
CnOM[2:0]
000
001
010
011
100
101
110
111
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Channel 8
Serial output from
Coefficient address register 1 (0x3B)
D7
D6
D5
D4
D3
7.2.44 Coefficient address register 2 (0x3C)
D2
D1
D0
CFA9
0
CFA8
0
7.2.45
D7
CFA7
0
D6
CFA6
0
D5
CFA5
0
D4
CFA4
0
D3
CFA3
0
D2
CFA2
0
Coefficient b1 data register, bits 23:16 (0x3D)
D1
CFA1
0
D0
CFA0
0
D7
C1B23
0
D6
C1B22
0
D5
C1B21
0
D4
C1B20
0
D3
C1B19
0
D2
C1B18
0
D1
C1B17
0
D0
C1B16
0
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Doc ID 022647 Rev 1