STA323WQS
Register descriptions
7.2
Configuration register B (address 0x01)
7.2.1
7.2.2
D7
C1IM
1
D6
C1IM
0
D5
DSCKE
0
D4
SAIFB
0
D3
SAI3
0
D2
SAI2
0
D1
SAI1
0
D0
SAI0
0
Serial audio input interface format
Table 21. Serial audio input interface format
Bit R/W RST Name
Description
3:0 RW 0000 SAI[3:0]
Determines the interface format of the input serial digital audio
interface.
4
RW 0
SAIFB
Data format:
0: MSB first
1: LSB first
Serial data interface
The STA323WQS serial audio input interfaces with standard digital audio components and
accepts several different serial data formats. The STA323WQS always acts as a slave when
receiving audio input from standard digital audio components. Serial data for two channels
is provided using 3 input pins: left/right clock LRCKI, serial clock BICKI, and serial data SDI.
The SAI register (configuration register B (address 0x01) bits D3-D0) and the SAIFB
register (configuration register B (address 0x01) bit D4) are used to specify the serial data
format. The default serial data format is I2S, MSB first. The formats available are shown in
Figure 48 and in Table 21 and Table 22.
Figure 48. General serial input and output formats
I2S
LRCLK
Left
Right
SCLK
SDATA
MSB
LSB
MSB
LSB
MSB
Left Justified
LRCLK
SCLK
SDATA
MSB
Left
LSB
MSB
Right
LSB
MSB
Right Justified
LRCLK
SCLK
SDATA
Left
MSB
Right
LSB
MSB
LSB
MSB
Table 22. lists the serial audio input formats supported by STA323WQS when
BICKI = 32 * fs, 48 * fs or 64 * fs, where the sampling rate fs = 32, 44.1, 48, 88.2, 96, 176.4
or 192 kHz.
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