STA323WTR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
STA323WTR Datasheet PDF : 41 Pages
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STA323W
6.4.1.1Current Address Multi-byte Read
The multi-byte read modes can start from any internal address. Sequential data bytes will be read from
sequential addresses within the STA323W. The master acknowledges each data byte read and then gen-
erates a STOP condition terminating the transfer.
6.4.2 Random Address Byte Read
Following the START condition the master sends a device select code with the RW bit set to 0. The
STA323W acknowledges this and then the master writes the internal address byte. After receiving, the
internal byte address the STA323W again responds with an acknowledgement. The master then initiates
another START condition and sends the device select code with the RW bit set to 1. The STA323W ac-
knowledges this and then responds by sending one byte of data. The master then terminates the transfer
by generating a STOP condition.
6.4.2.1Random Address Multi-byte Read
The multi-byte read modes could start from any internal address. Sequential data bytes will be read from
sequential addresses within the STA323W. The master acknowledges each data byte read and then gen-
erates a STOP condition terminating the transfer.
6.5 Write Mode Sequence
Figure 10. I2C Write Procedure
BYTE
WRITE
START
MULTIBYTE
WRITE
START
DEV-ADDR
DEV-ADDR
ACK
RW
ACK
RW
SUB-ADDR
ACK
SUB-ADDR
ACK
DATA IN
DATA IN
ACK
STOP
ACK
DATA IN
ACK
STOP
6.6 Read Mode Sequence
Figure 11. I2C Read Procedure
CURRENT
ADDRESS
READ
START
RANDOM
ADDRESS
READ
START
SEQUENTIAL
CURRENT
READ
START
SEQUENTIAL
RANDOM
READ
START
ACK
DEV-ADDR
DEV-ADDR
RW
ACK
DEV-ADDR
RW
RW= ACK
HIGH
DEV-ADDR
ACK
RW
DATA
SUB-ADDR
DATA
NO ACK
STOP
ACK
DEV-ADDR
START
ACK
DATA
ACK
RW
ACK
SUB-ADDR
ACK
START
DEV-ADDR
ACK
RW
DATA
DATA
DATA
NO ACK
STOP
NO ACK
ACK
STOP
DATA
ACK
DATA
NO ACK
STOP
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