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STA335W13TR View Datasheet(PDF) - STMicroelectronics

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STA335W13TR Datasheet PDF : 43 Pages
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STA335W
Register description
Writing a single coefficient to RAM
1. Select the RAM block with register 0x31 bit1, bit0.
2. Write 6-bits of address to I2C register 0x16.
3. Write top 8-bits of coefficient in I2C address 0x17.
4. Write middle 8-bits of coefficient in I2C address 0x18.
5. Write bottom 8-bits of coefficient in I2C address 0x19.
6. Write 1 to W1 bit in I2C address 0x26.
5.9.6
Post-scale
The STA335W provides one additional multiplication after the last interpolation stage and
the distortion compensation on each channel. This post-scaling is accomplished by using a
24-bit signed fractional multiplier, with 0x800000 = -1 and 0x7FFFFF = 0.9999998808. The
scale factor for this multiply is loaded into RAM using the same I2C registers as the biquad
coefficients and the bass-management. This post-scale factor can be used in conjunction
with an ADC equipped micro-controller to perform power-supply error correction. All
channels can use the channel-1 post-scale factor by setting the post-scale link bit. By
default, all post-scale factors are set to 0x7FFFFF. When line output is being used,
channel-3 post-scale will affect both channels 3 and 4.
5.9.7
Over-current post-scale
The STA335W provides a simple mechanism for reacting to over-current detection in the
power-block. When the ocwarn input is asserted, the over-current post-scale value is used
in place of the normal post-scale value to provide output attenuation on all channels. The
default setting provides 3 dB of output attenuation when ocwarn is asserted.
The amount of attenuation to be applied in this situation can be adjusted by modifying the
Over-current Post-scale value. As with the normal post-scale, this scaling value is a 24-bit
signed fractional multiplier, with 0x800000 = -1 and 0x7FFFFF = 0.9999998808. By default,
the over-current post-scale factor is set to 0x5A9DF7. Once the over-current attenuation is
applied, it remains until the device is reset.
Table 48. RAM block for scaling management
Index (Decimal) Index (Hex)
0
Reserved
Reserved
52
0x34
Channel 1 - Post-Scale
53
0x35
Channel 2 - Post-Scale
54
0x36
Reserved
55
0x37
TWARN/OC - Limit
Coefficient
Default
C1PstS
C2PstS
TWOCL
0x7FFFFF
0x7FFFFF
0x5A9DF7
5.10
Variable max power correction registers (addr 0x27 - 0x28)
D7
MPCC15
D6
MPCC14
D5
MPCC13
D4
MPCC12
D3
MPCC11
D2
MPCC10
D1
MPCC9
D0
MPCC8
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