STM32F030R8P6TR(2013) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F030R8P6TR
(Rev.:2013)

Value-line ARM®-based 32-bit MCU with up to 256-KB Flash, timers, ADC, communication interfaces, 2.4-3.6 V operation

STMicroelectronics 

STM32F030x4 STM32F030x6 STM32F030x8

Electrical characteristics

Input/output AC characteristics

The definition and values of input/output AC characteristics are given in Figure 18 and

Table 46, respectively.

Unless otherwise specified, the parameters given are derived from tests performed under

ambient temperature and VDD supply voltage conditions summarized in Table 18: General

operating conditions.

Table 46. I/O AC characteristics(1)

OSPEEDRy

[1:0] value(1)

Symbol

Parameter

Conditions

Min Max Unit

fmax(IO)out Maximum frequency(2) CL = 50 pF, VDD = 2.4 V to 3.6 V

-

2 MHz

x0

tf(IO)out

Output high to low level

fall time

- 125(3)

tr(IO)out

Output low to high level

rise time

CL = 50 pF, VDD = 2.4 V to 3.6 V

ns

- 125(3)

fmax(IO)out Maximum frequency(2) CL = 50 pF, VDD = 2.4 V to 3.6 V

- 10 MHz

01

tf(IO)out

Output high to low level

fall time

- 25(3)

tr(IO)out

Output low to high level

rise time

CL = 50 pF, VDD = 2.4 V to 3.6 V

ns

- 25(3)

11

FM+

configuration

(4)

fmax(IO)out Maximum frequency(2)

tf(IO)out

Output high to low level

fall time

tr(IO)out

Output low to high level

rise time

fmax(IO)out Maximum frequency(2)

tf(IO)out

Output high to low level

fall time

tr(IO)out

Output low to high level

rise time

CL = 30 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2.4 V to 2.7 V

CL = 30 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2.7 V to 3.6 V

CL = 30 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2.7 V to 3.6 V

CL = 50 pF, VDD = 2.4 V to 3.6 V

CL = 50 pF, VDD = 2.4 V to 3.6 V

CL = 50 pF, VDD = 2.4 V to 3.6 V

-

50

- 30 MHz

- 20

-

5(3)

-

8(3)

ns

-

5(3)

-

8(3)

-

2(3) MHz

- 12(3)

ns

- 34(3)

tEXTIpw

Pulse width of external

signals detected by the

EXTI controller

10

-

ns

1. The I/O speed is configured using the OSPEEDRx[1:0] bits. Refer to the RM0091 reference manual for a

description of GPIO Port configuration register.

2. The maximum frequency is defined in Figure 18.

3. Guaranteed by design, not tested in production.

4. When FM+ configuration is set, the I/O speed control is bypassed. Refer to the STM32F0xx reference

manual RM0091 for a detailed description of FM+ I/O configuration.

DocID024849 Rev 1

61/88

73

Share Link: