STUSB06E
Functional tables
Table 13. Pin states in power modes
Pins
Disable mode
Sharing mode
VREG
VCC_IO
VPU
D+, D-
VP, VM
RCV
3.3 V
Not present
High impedance
High impedance
Invalid
Invalid
Not Present
1.6 V to 3.6 V input
High impedance
High impedance
H
L
INT
FSE0
Inputs (VO, SPEED#,
SUSPEND, OE#, SOFTCON)
HIGHZ
Invalid
High impedance (1)
High impedance
Floating (2)
H
High impedance (1)
High impedance
Floating (2)
1. A 220 kΩ pull down is connected when HIGHZ="1".
2. HIGHZ input has an internal pull down resistor in order to disable HIGH-Z mode if left floating.
High-Z mode
-
1.6 V to 3.6 V input
High impedance
High impedance
High impedance (1)
High impedance (1)
High impedance (1)
High impedance (1)
High impedance
H
Table 14. Power supply configurations
Mode
VREG
Operating mode
Disable mode
Charger detection mode (2)
3.0 V to 3.6 V
X (1)
3.0 V to 3.6 V
1. X: don't care.
2. weak 150 kΩ pull-up is connected between D+ to VREG below some conditions.
VCC_IO
1.6 V to 3.6 V
GND
1.6 V to 3.6 V
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