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T89C51RD2-3CSCM View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
T89C51RD2-3CSCM
Atmel
Atmel Corporation 
T89C51RD2-3CSCM Datasheet PDF : 104 Pages
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T89C51RD2
Mode
Name
Mode
Program or Erase Lock.
PELCK
Disable the Erasure or Programming access
PEULCK
Program or Erase UnLock.
Enable the Erasure or Programming access
PGMC
Write Code Data (byte)
or write Page
Always precedeed by PGML
PGML
Memory Page Load
(up to 128 bytes)
PGMV Read Code Data (byte)
VSB Read Security Byte (=HSB)
PGMS
Write lock Byte (Note 4)
(security byte = HSB)
CERR Chip Erase User + XAF
PGXC
Write Byte or Page Extra Memory (XAF)
Always precedeed by PGXL
PGXL
Memory Page Load XAF
(up to 128 bytes)
TMS
Read Signature bytes
30h (Manufacturer code)
31h (Device ID #1)
60h (Device ID #2)
61h (Device ID #3)
RXAF
Read Extra Memory
(XAF)
P1[7..0]
xx
P2[5..0] P3.0 P3.1 P3.2 P3.3 P3.4 P3.5
xx
x
x
x
1
x
x
xx
xx
x
x
x
0
x
x
A7-A0
A13-A8
1
x
x
0 A14 A15
A7-A0
A7-A0
xx
xx
xx
A7-A0
(0-7F)
A7-A0
(0-7F)
30h
31h
60h
61h
Addr
(0-7F)
A13-A8
1
x
x
0 A14 A15
A13-A8
1
x
x
1 A14 A15
xx
1
x
x
1
x
x
xx
1
x
x
0
x
x
xx
1
x
x
0
x
x
xx
1
x
x
0
x
x
xx
1
x
x
1
x
x
x
x
x
x
1
x
x
00
1
x
x
0
x
x
1. In Page Load Mode the current byte is loaded on ALE rising edge.
2. After a power up all external test mode to program or to erase the Flash are locked to avoid any untimely programming or
erasure.
After each programming or erasure test mode, its advised to lock this feature (test mode PELCK).
To validate the test mode mode PEULCK the following sequence has to be applied:Test Mode PEULCK with ALE = 1.
Pulse on ALE (min width=25clk) with P0=55 (P0 latched on ALE rising edge)
Pulse on ALE (min width=25clk) with P0=AA (P0 latched on ALE rising edge)
3. The highest security bit (bit 7) is used to secure the 7 lowest bit erasure. The only way to erase this bit is to erase the whole
Flash memory.
Procedure to program security bits (After array programming):
- program bit7 to 0, program all other bits ( 1 = erased, 0 = programmed).
- test mode PGMS (din = HSB).
Procedure to erase security byte:
- test mode CERR: erase all array included HSB.
- program hardware security byte to FF: test mode PGMS (din = FF).
77
4243G805105/03

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