TDA9116 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
TDA9116 Datasheet PDF : 47 Pages
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TDA9116
Sad
D7
D6
D5
D4
D3
D2
D1
D0
PCAC (Pin cushion asymmetry correction)
11 Reserved
1
0
0
0
0
0
0
PARAL (Parallelogram correction)
12 Reserved
1
0
0
0
0
0
0
13
Reserved
14
Reserved
15
VDyCorPol
0: ”∪"
1
VDC-AMP (Vertical dynamic correction amplitude)
0
0
0
0
0
0
XRayReset
16 0: No effect
1: Reset
VSyncAuto VSyncSel
1: On 0:Comp
1:Sep
SDetReset HMoiMode PLL1Pump PLL1InhEn
0: No effect 0: Internal 1: Fast
1: On
1: Reset 1: External 0: Slow
HLockEn
1: On
17
TV
0: Off(46)
TH
0: Off(46)
TVM
0: Off(46)
THM
0: Off(46)
BOHEdge HBOutEn VOutEn BlankMode
0: Falling 0: Disable 0: Disable 1: Perm.
READ MODE (SLAVE ADDRESS = 8D)
XX
HLock
(45) 0: Locked
1: Not locked
VLock
0: Locked
1: Not lock.
XRayAlarm
Polarity detection
1: On
0: Off
HVPol
VPol
1: Negative 1: Negative
Sync detection
VExtrDet
HVDet
VDet
0: Not det. 0: Not det. 0: Not det.
Note 44: With exception of HDUTY and BREF adjustments data that can take effect instantaneously if switches
HDutySyncV and B+SyncV are at 0 respectively.
Note 45: In Read Mode, the device always outputs data of the status register, regardless of sub address previously
selected.
Note 46: The TV, TH, TVM and THM bits are for testing purposes and must be kept at 0 by application.
Description of I2C Bus switches and flags
Write-to bits
Sad00/D7 - HDutySyncV
Synchronization of internal application of Hori-
zontal Duty cycle data, buffered in I2C Bus latch,
with internal discharge of Vertical oscillator
0: Asynchronous mode, new data applied
with ACK bit of I2C Bus transfer on this sub
address
1: Synchronous mode
Sad06/D7 - BOutPol
Polarity of B+ drive signal on BOut pin
0: adapted to N type of power MOS - high
level to make it conductive
1: adapted to P type of power MOS - low level
to make it conductive
Sad07/D7 - BOutPh
Phase of start of B+ drive signal on BOut pin
0: Just after horizontal flyback pulse
1: With one of edges of line drive signal on
HOut pin, selected by BOHEdge bit
Sad02/D7 - HMoiré
Horizontal Moiré characteristics
0: Adapted to an architecture with EHT gener-
ated in deflection section
1: Adapted to an architecture with separated
deflection and EHT sections
Sad03/D7 - B+SyncV
Same as HDutySyncV, applicable for B+ refer-
ence data
Sad08/D7 - EWTrHFr
Tracking of all corrections contained in wave-
form on pin EWOut with Horizontal Frequency
0: Not active
1: Active
Sad15/D7 - VDyCorPol
Polarity of Vertical Dynamic Correction wave-
form (parabola)
0: Concave (minimum in the middle of the pa-
rabola)
1: Convex (maximum in the middle of the pa-
rabola)
23/47
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