M48T08-100PC1E View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

M48T08-100PC1E

5V, 64 Kbit (8 Kb x8) TIMEKEEPER® SRAM

STMicroelectronics 

M48T08, M48T08Y, M48T18

Data Retention Mode

With valid VCC applied, the M48T08/18/08Y oper-

ates as a conventional BYTEWIDE™ static RAM.

Should the supply voltage decay, the RAM will au-

tomatically power-fail deselect, write protecting it-

self when VCC falls within the VPFD (max), VPFD

(min) window. All outputs become high imped-

ance, and all inputs are treated as “Don't care.”

Note: A power failure during a WRITE cycle may

corrupt data at the currently addressed location,

but does not jeopardize the rest of the RAM's con-

tent. At voltages below VPFD (min), the user can be

assured the memory will be in a write protected

state, provided the VCC fall time is not less than tF.

The M48T08/18/08Y may respond to transient

noise spikes on VCC that reach into the deselect

window during the time the device is sampling

VCC. Therefore, decoupling of the power supply

lines is recommended.

When VCC drops below VSO, the control circuit

switches power to the internal battery which pre-

serves data and powers the clock. The internal

button cell will maintain data in the M48T08/18/

08Y for an accumulated period of at least 10 years

when VCC is less than VSO.

Note: Requires use of M4T32-BR12SH

SNAPHAT® top when using the SOH28 package.

As system power returns and VCC rises above

VSO, the battery is disconnected and the power

supply is switched to external VCC.

Write protection continues until VCC reaches VPFD

(min) plus trec (min). E1 should be kept high or E2

low as VCC rises past VPFD (min) to prevent inad-

vertent WRITE cycles prior to system stabilization.

Normal RAM operation can resume trec after VCC

exceeds VPFD (max).

For more information on Battery Storage Life refer

to the Application Note AN1012.

Power-fail Interrupt Pin

The M48T08/18/08Y continuously monitors VCC.

When VCC falls to the power-fail detect trip point,

an interrupt is immediately generated. An internal

clock provides a delay of between 10µs and 40µs

before automatically deselecting the M48T08/18/

08Y. The INT pin is an open drain output and re-

quires an external pull up resistor, even if the inter-

rupt output function is not being used.

12/27

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