M48Z19-100PC1 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
M48Z19-100PC1 Datasheet PDF : 13 Pages
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M48Z09, M48Z19
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
0 to 70
°C
TSTG
Storage Temperature (VCC Off)
–40 to 85
°C
VIO
Input or Output Voltages
–0.3 to 7
V
VCC
Supply Voltage
–0.3 to 7
V
IO
Output Current
20
mA
PD
Power Dissipation
1
W
Note: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this
specification is not implied. Exposure to the absolute maximum ratings conditions for extended periods of time may affect reliability.
CAUTION: Negative undershoots below –0.3 volts are not allowed on any pin while in the Battery Back-up mode.
Table 3. Operating Modes
Mode
VCC
E1
E2
G
W
DQ0-DQ7
Power
Deselect
VIH
X
X
X
High Z
Standby
Deselect
4.75V to 5.5V
or
X
VIL
X
X
High Z
Write
4.5V to 5.5V
VIL
VIH
X
VIL
DIN
Standby
Active
Read
VIL
VIH
VIL
VIH
DOUT
Active
Read
VIL
VIH
VIH
VIH
High Z
Active
Deselect VSO to VPFD (min)
X
X
X
X
High Z
CMOS Standby
Deselect
Note: X = VIH or VIL
≤ VSO
X
X
X
X
High Z Battery Back-up Mode
Figure 2A. DIP Pin Connections
INT 1
A12 2
28 VCC
27 W
A7 3
26 E2
A6 4
25 A8
A5 5
24 A9
A4 6
23 A11
A3 7 M48Z09 22 G
A2 8 M49Z19 21 A10
A1 9
20 E1
A0 10
19 DQ7
DQ0 11
18 DQ6
DQ1 12
17 DQ5
DQ2 13
16 DQ4
VSS 14
15 DQ3
AI01185
2/13
DESCRIPTION (cont’d)
The M48Z09,19 button cell has sufficient capacity
and storage life to maintain data for an accumu-
lated time period of at least 11 years in the absence
of power over the operating temperature range.
The M48Z09,19 is a non-volatile pin and function
equivalent to any JEDEC standard 8K x 8 SRAM.
It also easily fits into many ROM, EPROM, and
EEPROM sockets, providing the non-volatility of
PROMs without any requirement for special write
timing or limitations on the number of writes that
can be performed.
The M48Z09,19 also has its own Power-fail Detect
circuit. The control circuitry constantly monitors the
single 5V supply for an out of tolerance condition.
When VCC is out of tolerance, the circuit write
protects the SRAM, providing a high degree of data
security in the midst of unpredictable system opera-
tion brought on by low VCC. As VCC falls below
approximately 3V, the control circuitry connects the
battery which maintains data and clock operation
until valid power returns.
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