INSTRUCTION SUMMARY (Continued)
Instruction
and Operation
Address
Mode Opcode Flags Affected
dst src Byte (Hex) C Z S V D H
NOP
FF
------
OR dst, src
â€
dstâ†dst OR src
4[ ]
- TT0 - -
POP dst
R
50
dstâ†@SP;
IR
51
SPâ†SP + 1
------
PUSH src
SPâ†SP – 1;
@SPâ†src
R 70
IR 71
------
RCF
Câ†0
CF
0- - - - -
RET
PCâ†@SP;
SPâ†SP + 2
AF
------
RL dst
R
90
IR
91
C
7
0
TTTT- -
RLC dst
R
10
IR
11
C
7
0
RR dst
R
E0
IR
E1
C
7
0
TTTT- -
TTTT- -
RRC dst
R
IR
C
7
0
SBC dst, src
â€
dstâ†dstâ†srcâ†C
SCF
Câ†1
SRA dst
R
IR
C
7
0
C0
TTTT- -
C1
3[ ]
TTTT1 T
DF
1- - - - -
D0
TTT0 - -
D1
SRP src
RPâ†src
Im 31
------
Z86C61/62/96
Z8® MICROCONTROLLER
Instruction
and Operation
STOP
SUB dst, src
dstâ†dstâ†src
SWAP dst
7
43
0
Address
Mode Opcode Flags Affected
dst src Byte (Hex) C Z S V D H
6F
------
â€
2[ ]
TTTT1 T
R
F0
IR
F1
X TTX- -
TCM dst, src
â€
(NOT dst)
AND src
TM dst, src
â€
dst AND src
XOR dst, src
â€
dstâ†dst
XOR src
6[ ]
- TT0 - -
7[ ]
- TT0 - -
B[ ]
- TT0 - -
†These instructions have an identical set of addressing modes, which
are encoded for brevity. The first opcode nibble is found in the instruction
set table above. The second nibble is expressed symbolically by a ‘[ ]’
in this table, and its value is found in the following table to the left of the
applicable addressing mode pair.
For example, the opcode of an ADC instruction using the addressing
modes r (destination) and Ir (source) is 13.
Address Mode
dst
src
r
r
r
Ir
R
R
R
IR
R
IM
IR
IM
Lower
Opcode Nibble
[2]
[3]
[4]
[5]
[6]
[7]
42