Z86E4312FSC View Datasheet(PDF) - Zilog

Part Name

Description

Manufacturer

Z86E4312FSC

CMOS Z8® OTP Microcontrollers

Zilog 

CMOS Z8® OTP Microcontrollers

Product Specification

43

and P32 with reference to the voltage on P33. The analog function is enabled by setting

the D1 of Port 3 Mode Register (P3M). The comparator output can be outputted from P34

and P37, respectively, by setting PCON register Bit D0 to 1 state. For the interrupt func-

tion, P30 and P33 are falling edge triggered interrupt inputs. P31 and P32 can be pro-

grammed as falling, rising or both edges triggered interrupt inputs (see Figure 21). Access

to Counter/Timer 1 is made through P31 (TIN) and P36 (TOUT). Handshake tines for Port

0, Port 1, and Port 2 are also available on Port 3 (see Table 19).

Note: When enabling or disabling analog mode, the following is

recommended:

1. Allow two NOP decays before reading this comparator output.

2. Disable global interrupts, switch to analog mode, clear interrupts, and then re-enable

interrupts.

3. IRQ register bits 3 to 0 must be cleared after enabling analog mode.

Note: P33-P30 differs from the Z86C33/C43/233/243 in that there is no

clamping diode to VCC due to the EPROM high-voltage circuits.

Exceeding the VIH maximum specification during standard operating

mode may cause the device to enter EPROM mode.

PS022901-0508

Electrical Characteristics

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