TS80C31X2
IPH - Interrupt Priority High Register (B7h)
7
6
5
-
-
-
Table 10. IPH Register
4
3
PSH
PT1H
2
PX1H
Bit
Number
7
Bit
Mnemonic
Description
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Serial port Priority High bit
PSH
PS
Priority Level
4
PSH
0
0
0
1
Lowest
1
0
1
1
Highest
Timer 1 overflow interrupt Priority High bit
PT1H
PT1
Priority Level
3
PT1H
0
0
0
1
Lowest
1
0
1
1
Highest
External interrupt 1 Priority High bit
PX1H
PX1
Priority Level
2
PX1H
0
0
0
1
Lowest
1
0
1
1
Highest
Timer 0 overflow interrupt Priority High bit
PT0H
PT0
Priority Level
1
PT0H
0
0
0
1
Lowest
1
0
1
1
Highest
External interrupt 0 Priority High bit
PX0H
PX0
Priority Level
0
PX0H
0
0
0
1
Lowest
1
0
1
1
Highest
Reset Value = XXX0 0000b
Not bit addressable
1
PT0H
0
PX0H
Rev. C - 15 January, 2001
21