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TSM111CD View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
TSM111CD
ST-Microelectronics
STMicroelectronics 
TSM111CD Datasheet PDF : 17 Pages
First Prev 11 12 13 14 15 16 17
TSM111
EVALUATION BOARD - TECHNICAL NOTE
TSM111 is a Housekeeping IC which is best used
in PC Switch Mode Power Supplies for secondary
3.3V, 5V, and 12V power lines protection.
TSM111 integrates all the necessary functions for
a secure and reliable overcurrent and overvoltage
protection, as well as a logic interface for proper
communication with the motherboard and adjust-
able timing circuitry for optimized sequencing
management. Moreover, TSM111 integrates two
precise shunt voltage references for direct opto-
coupler drive. TSM111, integrating the equivalent
of more than 25 discrete components, saves a lot
of design time and fine tuning, as well as PCB ar-
ea, and increases the reliability of the whole appli-
cation.
How to use the TSM111 Evaluation Board ?
This evaluation board allows to adapt the TSM111
housekeeping chip to an already existing PC Pow-
er Supply by simply choosing proper values for it’s
external components, and making the adequate
connections to the I/O of the evaluation board.
The Electrical Schematic of the TSM111 evalua-
tion board is shown on figure 1. It includes the
TSM111 as well as the minimum component num-
ber required to make the TSM111 fit in a PC
SMPS application.
Components calculations
The overvoltage protection is not to be adjusted.
Internal voltage thresholds are given by Vvs1,
Vvs2, Vvs3 for respective protection of the 3.3V,
5V, 12V power lines.
The overcurrent protection is given by the choice
of the Sense resistors R1, R2, R3 (respectively for
each power line 3.3V, 5V, 12V). Internal precise
voltage thresholds define the tripping voltage
drops for each line following equations 1, 2 & 3 :
Vcs1 = R1 x I33
eq1
Vcs2 = R2 x I5
eq2
Vcs3 = R3 x I12
eq3
where I33, I5, and I12 are the tripping currents.
The system will latch (Fault output will be active -
high) if the overcurrent lasts more than the autho-
rized surge delay Tsur given by equations 4 & 5 :
Icharge = Vcc / R4
eq4
Tsur = (C1 x Vsur) / Icharge eq5
Note that eq4 is an approximation of a capacitive
charge where Vcc (16V min) is large versus the
threshold voltage Vsur (2.5V).
R4=33k, C1=4.7µF => Tsur=21ms
Thanks to the Tsur adjustment, the normal surge
currents which occur during power up (capacitive
oads charging) are blanked for a time depending
on each application.
EVALUATION BOARD - ELECTRICAL SCHEMATIC
J3 1
Optaux 2
Optaux
J16
VrefAux
J15
VrefMain
1
VrefAux
2
J18 1
OptMain 2
1
VrefMain
2
J7 1
IN12V
J6 1
In5V
J5 1
In3.3V
In12V
In5V
In3.3V
OptMain
R1
rs3.3V
R9 Roptaux
R10
C5
R7 RoptMain
C4
R8
R2
rs5V
R3
rs12V
J1
Vdet
J2
Fault
J13
Vcc
J14
Gnd
1
2
Vdet
1
Fault
2
VCC
1
2
1
2
D1
UV
5Vstby
R4
Rsur
11
UV
17
Tsur
6
PWM
U1 TSM111
R6
C1 Csur
U2 78L05 5Vstby
2
Vin
Vout
3
I
1INV
C7 +
C6
5Vstby
Out12V
Out5V
Out3.3V
1 J8
Out12V
1 J9
Out5V
1 J10
Out3.3V
R11
PG
9
Tpor
10
Rem
7
R5 R rem
PG
D6
From µc
D5
1 J11
2 PG
1 J12
2 Rem
C2
Crem
SW1 5Vstby
C3 1
2
Cpor 3
4
BP Rem 1 J20
2
13/17

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