VV5404 & VV6404
A detailed description of each register follows. The address indexes are shown as binary numbers in brackets [].
Index
000_0000
000_0001
000_0010
000_0011
000_0100
000_0101
000_011x
000_1xxx
001_0000
001_0001
001_0010
001_0011
001_0100
001_0101
001_011x
001_1xxx
010_0000
010_0001
010_0010
010_0011
010_0100
010_0101
010_0110
010_0111
010_1xxx
111_0000
111_0001
111_0010
111_0011
111_0100
111_0101
111_0110
111_0111
111_1000
111_1001
111_101x
111_11xx
Name
Length R/W Default
Comments
deviceH
deviceL
status0
line_countH
line_countL
Unused
Unused
Unused
setup0
setup1
setup2
Reserved
setup4
setup5
Unused
Unused
fineH
fineL
coarseH
coarseL
gain
clk_div
Unused
Unused
Unused
Reserved
Reserved
Reserved
Unused
Reserved
Reserved
cr
as0
Reserved
Unused
Unused
Unused
8
RO 0001 10012 Chip identification number
8
RO 0100 00002 including revision indicator
8
RO 0000 10002
8
RO
Current line counter MSB value
8
RO
Current line counter LSB value
8
R/W 0001 00012
8
R/W 1100 00012
8
R/W
31
Contains pixel counter reset
value used by external sync.
8
R/W
8
R/W
0
FST and QCK mode selects
0
FST and QCK mapping mode.
8
R/W
8
R/W
8
R/W
8
R/W
3
R/W
2
R/W
0
Fine exposure.
302
Coarse exposure
0
ADC Pre-amp gain Setting
0
Clock division
8
R/W 0000 00002 Control Register
8
R/W 0100 01002 ADC Setup Register
Table 8 : Serial Interface Address Map.
CD5404-6404F-A
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