XE8806ARI000 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
Manufacturer
XE8806ARI000 Datasheet PDF : 143 Pages
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XE8806A/XE8807A
7.1 Features
3 available clock sources (RC oscillator, quartz oscillator and external clock).
- 2 divider chains: high-prescaler (8 bits) and low-prescaler (15 bits).
- CPU clock disabling in halt mode.
7.2 Overview
The XE88LCxx chips can work on different clock sources (RC oscillator, quartz oscillator and external clock). The
clock generator block is in charge of distributing the necessary clock frequencies to the circuit.
Figure 7-1 represents the functionality of the clock block.
The internal RC oscillator or an external clock source can be selected to drive the high prescaler. This prescaler
generates frequency divisions down to 1/256 of its input frequency. A 32kHz clock is generated by enabling the
quartz oscillator (if present in the product) or by selecting the appropriate tap on the high prescaler. The low
prescaler generates clock signals from 32kHz down to 1Hz. The clock source for the CPU can be selected from
the RC oscillator, the external clock or the 32kHz clock.
7.3 Register map
pos.
7
6
5
4
3
2
1
0
RegSysClock
CpuSel
-
EnExtClock
BiasRc
ColdXtal
-
EnableXtal
EnableRc
rw
reset
function
r/w 0 nresetsleep Select speed for cpuck
r0
Unused
r/w 0 nresetcold Enable for external clock
r/w 1 nresetcold Enable Rcbias (reduces start-up time of RC).
r 1 nresetsleep Xtal in start phase
r0
Unused
r/w 0 nresetsleep Enable Xtal oscillator
r/w 1 nresetsleep Enable RC oscillator
Table 7-1: RegSysClock register
pos.
7-2
1
0
RegSysMisc
--
Output16k
OutputCpuCk
rw
reset
function
r 000000
Unused
r/w 0 nresetsleep Output 16 kHz signal on PB[3]
r/w 0 nresetsleep Output CPU clock on PB[2]
Table 7-2: RegSysMisc register
pos.
RegSysPre0
7-1 --
0
ClearLowPrescal
rw
reset
r 0000000
w1 0
r0
function
Unused
Write 1 to reset low prescaler, but always
reads 0
Table 7-3: RegSysPre0 register
© Semtech 2006
www.semtech.com
7-2
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