Z8932320FEC View Datasheet(PDF) - Zilog

Part Name

Description

Manufacturer

Z8932320FEC

16-BITDIGITAL SIGNALPROCESSORS

Zilog 

PRELIMINARY

ADDRESSING MODES

This section discusses the syntax of the addressing modes

supported by the DSP assembler.

Z89323/373/393

16-BIT DIGITAL SIGNAL PROCESSORS

Symbolic Name

<pregs>

<dregs>

(Points to RAM)

<hwregs>

<accind>

(Points to Program Memory)

<direct>

<limm>

<simm>

<regind>

(Points to RAM)

<memind>

(Points to Program Memory)

Table 15. Addressing Modes

Syntax

Description

Pn:b

Pointer Register

Dn:b

Data Register

X,Y,PC,SR,P

EXTn,A,BUS

@A

Hardware Registers

Accumulator Memory Indirect

<expression>

#<const exp>

#<const exp>

@Pn:b

@Pn:b+

@Pn:b–LOOP

@Pn:b+LOOP

@@Pn:b

@Dn:b

@@Pn:b–LOOP

@@Pn:b+LOOP

@@Pn:b+

Direct Address Expression

Long (16-bit) Immediate Value

Short (8-bit) Immediate Value

Pointer Register Indirect

Pointer Register Indirect with Increment

Pointer Register Indirect with Loop Decrement

Pointer register Indirect with Loop Increment

Pointer Register Memory Indirect

Data Register Memory Indirect

Pointer Register Memory Indirect with Loop Decrement

Pointer Register Memory Indirect with Loop Increment

Pointer Register Memory Indirect with Increment

44

DS95DSP0101 Q4/95

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