DSM2190F4 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

DSM2190F4

DSM (Digital Signal Processor System Memory) For Analog Devices ADSP-2191 DSPs (3.3V Supply)

STMicroelectronics 

DSM2190F4

Table 32. Write Timing

Symbol

Parameter

Conditions

-15

Unit

Min

Max

tAVWL Address Valid to Leading Edge of WR

(Notes 1)

0

ns

tSLWL

CS Valid to Leading Edge of WR

0

ns

tDVWH WR Data Setup Time

45

ns

tWHDX WR Data Hold Time

2

ns

tWLWH WR Pulse Width

48

ns

tWHAX1 Trailing Edge of WR to Address Invalid

1.75

ns

tWHAX2 Trailing Edge of WR to DPLD Address Invalid

(Note4)

0

ns

tWHPV

Trailing Edge of WR to Port Output

Valid Using I/O Port Data Register

35

ns

tDVMV

Data Valid to Port Output Valid

Using Macrocell Register Preset/Clear

(Note 3)

70

ns

tWLMV

WR Valid to Port Output Valid Using

Macrocell Register Preset/Clear

(Note 2)

70

ns

Note: 1. Any input used to select an internal PSM function.

2. Assuming data is stable before active write signal.

3. Assuming write is active before data becomes valid.

4. TWHAX2 is the address hold time for DPLD inputs that are used to generate Sector Select signals for internal DSM memory.

Figure 35. Write Timing

ADDRESS

NON-MULTIPLEXED

BUS

DATA

NON-MULTIPLEXED

BUS

CSI

WR

tAVWL

ADDRESS

VALID

tSLWL

DATA

VALID

t WLWH

tDVWH

t WHDX

t WHAX

AI04909

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