74V2G00STR(2000) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

74V2G00STR
(Rev.:2000)

DUAL 2-INPUT NAND GATE

STMicroelectronics 

®

74V2G00

DUAL 2-INPUT NAND GATE

s HIGH SPEED: tPD = 3.7 ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 1 µA (MAX.) at TA = 25 oC

s HIGH NOISE IMMUNITY:

VNIH = VNIL = 28% VCC (MIN.)

s POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8 mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 5.5V

s IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74V2G00 is an advanced high-speed CMOS

DUAL 2-INPUT NAND GATE fabricated with

sub-micron silicon gate and double-layer metal

SOT23-8L

PACKAGE

SOT23-8L

ORDER CODES

T UB E

T&R

74V2G00STR

wiring C2MOS technology.

The internal circuit is composed of 3 stages

including buffer output, which provide high noise

immunity and stable output.

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage. This

device can be used to interface 5V to 3V.

PIN CONNECTION AND IEC LOGIC SYMBOLS

June 2000

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