TS615IPWT(2004) View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
TS615IPWT Datasheet PDF : 36 Pages
| |||
TS615
Printed Circuit Board Layout Considerations
6 Printed Circuit Board Layout Considerations
In the ADSL frequency rangey, printed circuit board parasites can affect the closed-loop performance.
The use of a proper ground plane on both sides of the PCB is necessary to provide low inductance and a
low resistance common return. The most important factors affecting gain flatness and bandwidth are
stray capacitance at the output and inverting input. To minimize capacitance, the space between signal
lines and ground plane should be maximized. Feedback component connections must be as short as
possible in order to decrease the associated inductance which affects high-frequency gain errors. It is
very important to choose the smallest possible external components—for example, surface mounted
devices (SMD)—in order to minimize the size of all DC and AC connections.
6.1 Thermal information
The TS615 is housed in an exposed-pad plastic package. As described in Figure 55, this package has a
lead frame upon which the dice is mounted. This lead frame is exposed as a thermal pad on the
underside of the package. The thermal contact is direct with the dice. This thermal path provides an
excellent thermal performance.
The thermal pad is electrically isolated from all pins in the package. It must be soldered to a copper area
of the PCB underneath the package. Through these thermal paths within this copper area, heat can be
conducted away from the package. The copper area must be connected to -VCC available on pin 4.
Figure 55. Exposed-pad package
Figure 56. Evaluation board
1
Side View
Bottom View
DICE
Cross Section View
20/36
Share Link: 