74VHCT541AMTR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

74VHCT541AMTR

OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)

STMicroelectronics 

74VHCT541A

OCTAL BUS BUFFER

WITH 3 STATE OUTPUTS (NON INVERTED)

s HIGH SPEED: tPD = 4.1 ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 4 µA (MAX.) at TA=25°C

s COMPATIBLE WITH TTL OUTPUTS:

VIH = 2V (MIN.), VIL = 0.8V (MAX)

s POWER DOWN PROTECTION ON INPUTS

& OUTPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8 mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC(OPR) = 4.5V to 5.5V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 541

s IMPROVED LATCH-UP IMMUNITY

s LOW NOISE: VOLP = 0.9V (MAX.)

DESCRIPTION

The 74VHCT541A is an advanced high-speed

CMOS OCTAL BUS BUFFER (3-STATE)

fabricated with sub-micron silicon gate and

double-layer metal wiring C2MOS technology.

The 3 STATE control gate operates as two input

AND such that if either G1 and G2 are high, all

eight outputs are in the high impedance state.

SOP

TSSOP

Table 1: Order Codes

PACKAGE

SOP

TSSOP

T&R

74VHCT541AMTR

74VHCT541ATTR

In order to enhance PC board layout, the

74VHCT541 offers a pinout having inputs and

outputs on opposite sides of the package.

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage. This

device can be used to interface 5V to 3V since all

inputs are equipped with TTL threshold.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

Figure 1: Pin Connection And IEC Logic Symbols

December 2004

Rev. 4

1/12

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