PSD4226F3V-20UIT View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
PSD4226F3V-20UIT
STMicroelectronics
PSD4226F3V-20UIT Datasheet PDF : 89 Pages
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PSD4235G2
Output Macrocell (OMC). Eight of the Output
Macrocells (OMC) are connected to Ports A pins
and are named as McellA0-McellA7. The other
eight Macrocells are connected to Ports B pins
and are named as McellB0-McellB7.
The Output Macrocell (OMC) architecture is
shown in Figure 15. As shown in the figure, there
are native product terms available from the AND
Array, and borrowed product terms available (if
unused) from other Output Macrocells (OMC). The
polarity of the product term is controlled by the
XOR gate. The Output Macrocell (OMC) can im-
plement either sequential logic, using the flip-flop
element, or combinatorial logic. The multiplexer
selects between the sequential or combinatorial
logic outputs. The multiplexer output can drive a
port pin and has a feedback path to the AND Array
inputs.
The flip-flop in the Output Macrocell (OMC) block
can be configured as a D, T, JK, or SR type in the
PSDsoft Express program. The flip-flop’s clock,
preset, and clear inputs may be driven from a
product term of the AND Array. Alternatively, the
external CLKIN (PD1) signal can be used for the
clock input to the flip-flop. The flip-flop is clocked
on the rising edge of CLKIN (PD1). The preset and
clear are active High inputs. Each clear input can
use up to two product terms.
Table 33. Output Macrocell Port and Data Bit Assignments
Output
Macrocell
Port
Assignment
Native Product
Terms
Maximum
Borrowed
Product Terms
McellA0
Port A0
3
6
McellA1
Port A1
3
6
McellA2
Port A2
3
6
McellA3
Port A3
3
6
McellA4
Port A4
3
6
McellA5
Port A5
3
6
McellA6
Port A6
3
6
McellA7
Port A7
3
6
McellB0
Port B0
4
5
McellB1
Port B1
4
5
McellB2
Port B2
4
5
McellB3
Port B3
4
5
McellB4
Port B4
4
6
McellB5
Port B5
4
6
McellB6
Port B6
4
6
McellB7
Port B7
4
6
Data Bit for
Loading or
Reading
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
Motorola 16-Bit
MCU for Loading or
Reading
D8
D9
D10
D11
D12
D13
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
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