FDC37C78-HT View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

FDC37C78-HT

Floppy Disk Controller

Microchip Technology 

BIT NO.

7

6

5

4

3

2

1,0

SYMBOL

WP

T0

HD

DS1,0

Table 17 - Status Register 3

NAME

DESCRIPTION

Unused. This bit is always "0".

Write

Protected

Indicates the status of the WP pin.

Unused. This bit is always "1".

Track 0

Indicates the status of the TRK0 pin.

Unused. This bit is always "1".

Head Address Indicates the status of the HDSEL pin.

Drive Select Indicates the status of the DS1, DS0 pins.

RESET

There are three sources of system reset on the

FDC: the RESET pin of the FDC37C78, a reset

generated via a bit in the DOR, and a reset

generated via a bit in the DSR. At power on, a

Power On Reset initializes the FDC. All resets

take the FDC out of the power down state.

All operations are terminated upon a RESET, and

the FDC enters an idle state. A reset while a disk

write is in progress will corrupt the data and CRC.

On exiting the reset state, various internal

registers are cleared, including the Configure

command information, and the FDC waits for a

new command. Drive polling will start unless

disabled by a new Configure command.

RESET Pin (Hardware Reset)

The RESET pin is a global reset and clears all

registers except those programmed by the Specify

command. The DOR reset bit is enabled and

must be cleared by the host to exit the reset state.

DOR Reset vs. DSR Reset (Software Reset)

These two resets are functionally the same. Both

will reset the FDC core, which affects drive status

information and the FIFO circuits. The DSR reset

clears itself automatically while the DOR reset

requires the host to manually clear it. DOR reset

has precedence over the DSR reset. The DOR

reset is set automatically upon a pin reset. The

user must manually clear this reset bit in the DOR

to exit the reset state.

MODE OF OPERATION

PC/AT mode - (IDENT high, MFM a "don't care")

The PC/AT register set is enabled, the DMA

enable bit of the DOR becomes valid (IRQ and

DRQ can be hi Z), and TC and DENSEL become

active high signals.

25

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