STLC5048
Coefficient State register (COEFST)
Addr= 61h; Reset Value=F0h
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
R/W
1
1
0
0
0
0
1
FD3
FD2
FD1
FD0
FR3
FR2
FR1
FR0
FR0..3=1: All channel filters and gain blocks are configured as defined in the ringing state
FR0..3=0: All channel filters and gain blocks are configured as defined with the programmed value if also the
corresponding FD bit is set to 0
FD0..3=1: All channel filters and gain blocks are configured as defined in the default state if also the correspond-
ing FR bit is set to 0
FD0..3=0: All channel filters and gain blocks are configured as defined with the programmed value if also the
corresponding FR bit is set to 0
Software Revision ID Code (SWRID)
Addr=70h; Read only.
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
1
1
1
1
0
0
0
0
0
0
0
1
0
1
0
0
This register contains the DSP Software revision Code identifier.
Hardware Revision ID Code (HWRID)
Addr=71h; Read only.
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
1
1
1
1
0
0
0
1
0
0
0
0
0
0
0
1
This register contains the Silicon revision Code identifier.
SINGLE BYTE INSTRUCTION
Name
Description
ID
REACOM
Realignment command
28h
CKSTART
Start Checksum
29h
Realignment Command (REACOM)
This single instruction is used to realign the MCU interface in case of out of synchronisation. This instruction
must be executed Nmax+1 times to be successfull.
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0
0
1
0
1
0
0
0
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