M38747M6F-XXXGP View Datasheet(PDF) - MITSUBISHI ELECTRIC

Part Name

Description

Manufacturer

M38747M6F-XXXGP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI ELECTRIC  

MITSUBISHI MICROCOMPUTERS

3874 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

(2) Asynchronous Serial I/O (UART) Mode

Clock asynchronous serial I/O mode (UART) can be selected by

clearing the serial I/O1 mode selection bit (b6) of the serial I/O1

control register to “0”.

Eight serial data transfer formats can be selected, and the transfer

formats used by a transmitter and receiver must be identical.

The transmit and receive shift registers each have a buffer regis-

ter, but the two buffers have the same address in memory. Since

the shift register cannot be written to or read from directly, transmit

data is written to the transmit buffer, and receive data is read from

the receive buffer.

The transmit buffer can also hold the next data to be transmitted,

and the receive buffer register can hold a character while the next

character is being received.

P44/RXD

P46/SCLK1

Data bus

Address 001816

Serial I/O control register Address 001A16

OE

Receive buffer register

Character length selection bit

STdetector 7 bits

Receive shift register

8 bits

Receive buffer full flag (RBF)

Receive interrupt request (RI)

1/16

PE FE SP detector

Clock control circuit

UART control register

Address 001B16

Serial I/O1 synchronous clock selection bit

XIN

P45/TXD

BRG count source selection bit

1/4

Frequency division ratio 1/(n+1)

Baud rate generator

Address 001C16

ST/SP/PA generator

1/16

Transmit shift register shift completion flag (TSC)

Transmit shift register

Transmit interrupt source selection bit

Transmit interrupt request (TI)

Character length selection bit

Transmit buffer register

Transmit buffer empty flag (TBE)

Address 001816 Serial I/O1 status register Address 001916

Data bus

Fig. 28 Block diagram of UART serial I/O1

Transmit or receive clock

Transmit buffer write signal

Serial I/O output TXD

Receive buffer read signal

TBE=0

TSC=0

TBE=1

ST

TBE=0

D0

D1

1 start bit

7 or 8 data bits

1 or 0 parity bit

1 or 2 stop bit (s)

Serial I/O input RXD

ST

D0

D1

TBE=1

SP

ST D0

TSC=1V

D1

SP

VGenerated at 2nd bit in 2-stop-bit mode

RBF=1

SP ST

RBF=0

D0

D1

RBF=1

SP

Notes 1 : Error flag detection occurs at the same time that the RBF flag becomes “1” (at 1st stop bit, during reception).

2 : The transmit interrupt (TI) can be selected to occur when either the TBE or TSC flag becomes “1”, depending on the setting of the transmit interrupt

source selection bit (TIC) of the serial I/O1 control register.

3 : The receive interrupt (RI) is set when the RBF flag becomes “1”.

4 : After data is written to the transmit buffer register when TSC=1, 0.5 to 1.5 cycles of the data shift cycle is necessary until changing to TSC=0.

Fig. 29 Operation of UART serial I/O function

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