PIC16F636T-I/SL(2005) View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F636T-I/SL
(Rev.:2005)

8/14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC12F635/PIC16F636/639

12.1 Configuration Word Bits

The Configuration Word bits can be programmed (read

as ‘0’), or left unprogrammed (read as ‘1’) to select

various device configurations as shown in Register 12-1.

These bits are mapped in program memory location

2007h.

Note:

Address 2007h is beyond the user program

memory space. It belongs to the special

configuration memory space (2000h-

3FFFh), which can be accessed only during

programming. See “PIC12F6XX/16F6XX

Memory Programming Specification”

(DS41204) for more information.

REGISTER 12-1: CONFIG – CONFIGURATION WORD (ADDRESS: 2007h)

U-1

—

bit 13

R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1

WURE FCMEN IESO BODEN1 BODEN0 CPD

R/P-1

CP

R/P-1 R/P-1 R/P-1

MCLRE PWRTE(1) WDTE

R/P-1

FOSC2

R/P-1

F0SC1

R/P-1

F0SC0

bit 0

bit 13

bit 12

bit 11

bit 10

bit 9-8

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2-0

Unimplemented: Read as ‘1’

WURE: Wake-up Reset Enable bit

1 = Standard wake-up and continue enabled

0 = Wake-up and Reset enabled

FCMEN: Fail-Safe Clock Monitor Enable bit

1 = Fail-Safe Clock Monitor enabled

0 = Fail-Safe Clock Monitor disabled

IESO: Internal-External Switchover bit

1 = Internal External Switchover mode enabled

0 = Internal External Switchover mode disabled

BODEN<1:0>: Brown-out Detect Enable bits

11 = BOD enabled and SBODEN bit disabled

10 = BOD enabled while running and disabled in Sleep. SBODEN bit disabled.

01 = SBODEN in Register 2-6 controls BOD function

00 = BOD and SBODEN disabled

CPD: Code Protection Data bit

1 = Data memory is not protected

0 = Data memory is external read protected

CP: Code Protection bit

1 = Program memory is not code-protected

0 = Program memory is external read and write-protected

MCLRE: MCLR Pin Function Select bit

1 = MCLR pin is MCLR function and weak internal pull-up is enabled

0 = MCLR pin is alternate function, MCLR function is internally disabled

PWRTE: Power-up Timer Enable bit(1)

1 = PWRT disabled

0 = PWRT enabled

WDTE: Watchdog Timer Enable bit

1 = WDT enabled

0 = WDT disabled and can be enabled using SWDTEN in Register 12-2

FOSC<2:0>: Oscillator Selection bits

000 = LP oscillator: Low power crystal on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT

001 = XT oscillator: Crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT

010 = HS oscillator: High-speed crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT

011 = EC: I/O function on RA4/T1G/OSC2/CLKOUT, CLKIN on RA5/T1CKI/OSC1/CLKIN

100 = INTOSCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT, I/O function on RA5/T1CKI/OSC1/CLKIN

101 = INTOSC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT, I/O function on RA5/T1CKI/OSC1/CLKIN

110 = EXTRCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT, RC on RA5/T1CKI/OSC1/CLKIN

111 = EXTRC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT, RC on RA5/T1CKI/OSC1/CLKIN

Note 1: Enabling Brown-out Detect does not automatically enable the Power-up Timer (PWRT).

Legend:

R = Readable bit

- n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

DS41232B-page 112

Preliminary

© 2005 Microchip Technology Inc.

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