PIC12F635-I/SS View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC12F635-I/SS

8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC12F635/PIC16F636/639

13.2 Instruction Descriptions

ADDLW

Syntax:

Operands:

Operation:

Status Affected:

Description:

Add literal and W

[ label ] ADDLW k

0 ≤ k ≤ 255

(W) + k → (W)

C, DC, Z

The contents of the W register

are added to the eight-bit literal ‘k’

and the result is placed in the

W register.

BCF

Syntax:

Operands:

Operation:

Status Affected:

Description:

Bit Clear f

[ label ] BCF f,b

0 ≤ f ≤ 127

0≤b≤7

0 → (f<b>)

None

Bit ‘b’ in register ‘f’ is cleared.

ADDWF

Syntax:

Operands:

Operation:

Status Affected:

Description:

Add W and f

[ label ] ADDWF f,d

0 ≤ f ≤ 127

d ∈ [0,1]

(W) + (f) → (destination)

C, DC, Z

Add the contents of the W register

with register ‘f’. If ‘d’ is ‘0’, the

result is stored in the W register. If

‘d’ is ‘1’, the result is stored back

in register ‘f’.

ANDLW

Syntax:

Operands:

Operation:

Status Affected:

Description:

AND literal with W

[ label ] ANDLW k

0 ≤ k ≤ 255

(W) .AND. (k) → (W)

Z

The contents of W register are

AND’ed with the eight-bit literal

‘k’. The result is placed in the W

register.

ANDWF

Syntax:

Operands:

Operation:

Status Affected:

Description:

AND W with f

[ label ] ANDWF f,d

0 ≤ f ≤ 127

d ∈ [0,1]

(W) .AND. (f) → (destination)

Z

AND the W register with register

‘f’. If ‘d’ is ‘0’, the result is stored in

the W register. If ‘d’ is ‘1’, the

result is stored back in register ‘f’.

BSF

Syntax:

Operands:

Operation:

Status Affected:

Description:

Bit Set f

[ label ] BSF f,b

0 ≤ f ≤ 127

0≤b≤7

1 → (f<b>)

None

Bit ‘b’ in register ‘f’ is set.

BTFSC

Bit Test f, Skip if Clear

Syntax:

Operands:

Operation:

Status Affected:

Description:

[ label ] BTFSC f,b

0 ≤ f ≤ 127

0≤b≤7

skip if (f<b>) = 0

None

If bit ‘b’ in register ‘f’ is ‘1’, the next

instruction is executed.

If bit ‘b’, in register ‘f’, is ‘0’, the

next instruction is discarded, and

a NOP is executed instead, making

this a two-cycle instruction.

© 2007 Microchip Technology Inc.

DS41232D-page 151

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