VNI8200XP View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

VNI8200XP

Octal high-side smart power solid-state relay with serial/parallel selectable interface on-chip

STMicroelectronics 

VNI8200XP

SPI operation (SEL2 = H)

10

10.1

SPI operation (SEL2 = H)

8-bit SPI mode (SEL1 = L)

If SEL2 = H, the 8-bit SPI mode is based on an 8-bit command frame sent from the

microcontroller to the IC; each bit directly drives the corresponding output where LSB

drives output 0 and MSB drives output 7. Each bit, set to ‘1’, activates (closes) the

corresponding output.

At the same time, the IC transfers the channel fault conditions (OVT) to the microcontroller.

These fault conditions are latched at the occurrence and cleared after each communication

(each time the SS signal has a positive transition). Each bit, set to ‘1’, indicates an OVT

condition for the corresponding channel.

MSB

Table 15: Command 8-bit frame (master-to-slave)

LSB

IN7

IN6

IN5

IN4

IN3

IN2

IN1

IN0

MSB

F7

Table 16: Fault 8-bit frame (slave-to-master)

F6

F5

F4

F3

F2

F1

LSB

F0

10.2 16-bit SPI mode (SEL1 = H)

The 16-bit SPI mode is based on a 16-bit command frame sent from the microcontroller to

the IC; the first 8 bits directly drive the output channels (each bit, set to ‘1’, activates the

corresponding output), the other 8 bits contain a 4-bit parity check code where the last bit

(the inversion of the previous one) is used to detect a communication error condition

(providing at least a transition in each frame):

P0 = IN0 +IN1+ IN2 +IN3 +IN4+ IN5+ IN6 +IN7

P1 = IN1 + IN3 + IN5 + IN7

P2 = IN0 + IN2 + IN4 + IN6

nP0 = Not P0

MSB

Table 17: Command 16-bit frame (master-to-slave)

LSB

IN7 IN6 IN5 IN4 IN3 IN2 IN1 IN0

P2 P1 P0

nP0

At the same time, the IC transfers to the microcontroller a 16-bit fault frame where the first

8 bits indicate a channel fault (OVT) condition (each bit, set to ‘1’, indicates an OVT event),

the following 4 bits provide general fault condition information. FB_OK: this bit is related to

the DC-DC regulation: at the DC-DC turn-on, this bit is low and becomes high after FB

rises above 90% of the nominal VFB voltage and a correct SPI communication occurred. If

the FB voltage falls below 80% of the nominal VFB voltage, this bit is zero; TWARN (IC

warning case temperature), PC (parity check fail, the bit, set to ‘1’, indicates a PC fail or the

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