MC9S08SH8CSC View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MC9S08SH8CSC

HCS08 Microcontrollers

Freescale Semiconductor 

Appendix A Electrical Characteristics

A.12 AC Characteristics

This section describes ac timing characteristics for each peripheral system.

A.12.1 Control Timing

Table A-13. Control Timing

Nu

m

C

Rating

Symbol

Min

Typ1

Max Unit

1

D Bus frequency (tcyc = 1/fBus)

fBus

dc

—

20

MHz

2 D Internal low power oscillator period

tLPO

800

1500 μs

3 D External reset pulse width2

textrst

100

—

ns

4 D Reset low drive3

trstdrv

66 x tcyc

—

ns

Pin interrupt pulse width

8 D Asynchronous path2

Synchronous path5

Port rise and fall time —

Low output drive (PTxDS = 0) (load = 50 pF)4

Slew rate control disabled (PTxSE = 0)

Slew rate control enabled (PTxSE = 1)

9

C

Port rise and fall time —

High output drive (PTxDS = 1) (load = 50 pF)6

Slew rate control disabled (PTxSE = 0)

Slew rate control enabled (PTxSE = 1)

tILIH, tIHIL

100

—

1.5 x tcyc

tRise, tFall

—

40

—

75

tRise, tFall

—

11

—

35

—

ns

—

ns

—

—

ns

—

1 Typical values are based on characterization data at VDD = 5.0V, 25°C unless otherwise stated.

2 This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to

override reset requests from internal sources.

3 When any reset is initiated, internal circuitry drives the reset pin low for about 66 cycles of tcyc. After POR reset the bus clock

frequency changes to the untrimmed DCO frequency (freset = (fdco_ut)/4) because TRIM is reset to 0x80 and FTRIM is reset

to 0, and there is an extra divide-by-two because BDIV is reset to 0:1. After other resets trim stays at the pre-reset value.

4 Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40°C to 125°C.

RESET PIN

textrst

Figure A-10. Reset Timing

MC9S08SH8 MCU Series Data Sheet, Rev. 3

Freescale Semiconductor

309

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